A semiconductor device includes a chip, a first kerf adjacent the chip and having a first main direction, a second kerf adjacent the chip and having a second main direction. A kerf junction is formed by the first kerf and the second kerf. A crack stop barrier is located along a first portion of a perimeter of the kerf junction.

A semiconductor device includes a chip, a first kerf adjacent the chip and having a first main direction, a second kerf adjacent the chip and having a second main direction. A kerf junction is formed by the first kerf and the second kerf. A crack stop barrier is located along a first portion of a perimeter of the kerf junction.

According to the present disclosure, a method for producing a plurality of semiconductor chips is provided with the following steps: a) providing a composite assembly, including a carrier, a semiconductor layer sequence and a functional layer; b) severing the functional layer by means of coherent radiation along a singulation pattern; c) forming separating trenches in the carrier along the singulation pattern; and d) applying a protective layer, which delimits the functional layer toward the separating trenches, on in each case at least one side surface of the semiconductor chips to be singulated. The singulated semiconductor chips each includes a part of the semiconductor layer sequence, of the carrier and of the functional layer.

According to the present disclosure, a method for producing a plurality of semiconductor chips is provided with the following steps: a) providing a composite assembly, including a carrier, a semiconductor layer sequence and a functional layer; b) severing the functional layer by means of coherent radiation along a singulation pattern; c) forming separating trenches in the carrier along the singulation pattern; and d) applying a protective layer, which delimits the functional layer toward the separating trenches, on in each case at least one side surface of the semiconductor chips to be singulated. The singulated semiconductor chips each includes a part of the semiconductor layer sequence, of the carrier and of the functional layer.

Multiple wide bandgap semiconductor wafers, each having active circuitry and an epitaxially formed backside drain contact layer, may be constructed from a single bulk semiconductor substrate by: forming foundational layers on the top of the bulk substrate via epitaxy; forming active circuitry atop the foundational layers; laser treating the backside of the bulk substrate to create a cleave line in one of the foundational layers; and exfoliating a semiconductor wafer from the bulk substrate, where the exfoliated semiconductor wafer contains the active circuits and at least a portion of the foundational layers. Wafers containing the foundational layers without complete active devices may be produced in a similar manner. The foundational layers may comprise a drain contact layer and a drift layer, and may additionally include a buffer layer between the drain contact layer and the drift layer.

A semiconductor device has a first semiconductor die and second semiconductor die with a conductive layer formed over the first semiconductor die and second semiconductor die. The second semiconductor die is disposed adjacent to the first semiconductor die with a side surface and the conductive layer of the first semiconductor die contacting a side surface and the conductive layer of the second semiconductor die. An interconnect, such as a conductive material, is formed across a junction between the conductive layers of the first and second semiconductor die. The conductive layer may extend down the side surface of the first semiconductor die and further down the side surface of the second semiconductor die. An extension of the side surface of the first semiconductor die can interlock with a recess of the side surface of the second semiconductor die. The conductive layer extends over the extension and into the recess.

A semiconductor device has a first semiconductor die and second semiconductor die with a conductive layer formed over the first semiconductor die and second semiconductor die. The second semiconductor die is disposed adjacent to the first semiconductor die with a side surface and the conductive layer of the first semiconductor die contacting a side surface and the conductive layer of the second semiconductor die. An interconnect, such as a conductive material, is formed across a junction between the conductive layers of the first and second semiconductor die. The conductive layer may extend down the side surface of the first semiconductor die and further down the side surface of the second semiconductor die. An extension of the side surface of the first semiconductor die can interlock with a recess of the side surface of the second semiconductor die. The conductive layer extends over the extension and into the recess.

A method of processing a semiconductor wafer, in which a mask is formed: by cutting, with CO.sub.2 laser, a portion corresponding to a street, out of a temporary-adhesive of a surface protective tape to protect on a patterned face; carrying out dicing with SF.sub.6 plasma; and carrying out ashing, by removing a layer of the temporary-adhesive, with O.sub.2 plasma; a semiconductor chip; and a surface protective tape.

A method of processing a semiconductor wafer, in which a mask is formed: by cutting, with CO.sub.2 laser, a portion corresponding to a street, out of a temporary-adhesive of a surface protective tape to protect on a patterned face; carrying out dicing with SF.sub.6 plasma; and carrying out ashing, by removing a layer of the temporary-adhesive, with O.sub.2 plasma; a semiconductor chip; and a surface protective tape.

A wafer-fixing tape, having: an temporary-adhesive layer provided on a substrate film, wherein the substrate film contains an ionomer resin comprising a terpolymer crosslinked by a metal ion, and wherein an arithmetic average roughness Ra of a surface of the substrate film opposite to the temporary-adhesive layer 5b is from 0.1 to 3.0 μm; a processing method of a semiconductor wafer; and a semiconductor chip.