A light emitting device including a fluorescent material with reduced hue, and a method of manufacturing the light emitting device are provided.

A light emitting device 100 includes: a light emitting element 1; a first light-transmissive member 3 covering the light emitting element 1; and a light diffusing member 5 contained in the first light-transmissive member 3. The light diffusing member 5 includes hollow particles. The surface of the first light-transmissive member 3 has irregular shapes attributed to the light diffusing member 5. The first light-transmissive member 3 is covered with a second light-transmissive member 4. The second light-transmissive member 4 has a convex structure in which the center is the uppermost point. The irregular shapes attributed to the light diffusing member 5 are covered with the second light-transmissive member 4.

A semiconductor device is provided that includes a bond pad, an insulating layer, and a bonding structure. The bond pad is in a dielectric layer and the insulating layer is over the bond pad; the insulating layer having an opening over the bond pad formed therein. The bonding structure electrically couples the bond pad in the opening. The bonding structure has a height that at least extends to an upper surface of the insulating layer.

The application provides a semiconductor packaging structure, a semiconductor packaging method, a semiconductor packaging device and an electronic product. The semiconductor packaging structure comprises a substrate, at least one packaged component, a redistribution layer and a passivation layer. The substrate has at least one groove and the at least one packaged component is fixed in the at least one groove in one-to-one correspondence. Each packaged component is separated from a corresponding groove, in which the package component is disposed, by insulating materials. The at least one packaged component has first bonding pads on at least one active surface facing away from the substrate and are flush. The redistribution layer is formed over the at least one active surface. The substrate includes a semiconductor material or insulating material with a thermal expansion coefficient that is the same as or similar to that of a base semiconductor material in the packaged component.

The application provides a semiconductor packaging structure, a semiconductor packaging method, a semiconductor packaging device and an electronic product. The semiconductor packaging structure comprises a substrate, at least one packaged component, a redistribution layer and a passivation layer. The substrate has at least one groove and the at least one packaged component is fixed in the at least one groove in one-to-one correspondence. Each packaged component is separated from a corresponding groove, in which the package component is disposed, by insulating materials. The at least one packaged component has first bonding pads on at least one active surface facing away from the substrate and are flush. The redistribution layer is formed over the at least one active surface. The substrate includes a semiconductor material or insulating material with a thermal expansion coefficient that is the same as or similar to that of a base semiconductor material in the packaged component.

The application provides a semiconductor packaging structure, a semiconductor packaging method, a semiconductor packaging device and an electronic product. The semiconductor packaging structure comprises a substrate, at least one packaged component, a redistribution layer and a passivation layer. The substrate has at least one groove and the at least one packaged component is fixed in the at least one groove in one-to-one correspondence. Each packaged component is separated from a corresponding groove, in which the package component is disposed, by insulating materials. The at least one packaged component has first bonding pads on at least one active surface facing away from the substrate and are flush. The redistribution layer is formed over the at least one active surface. The substrate includes a semiconductor material or insulating material with a thermal expansion coefficient that is the same as or similar to that of a base semiconductor material in the packaged component.

An electronic component includes a substrate, a functional element on the substrate, a support body, a covering portion, and a protective layer covering the covering portion. The support body is provided on the substrate and around a region in which the functional element is located. The covering portion faces the substrate and is supported by the support body. The substrate, the support body, and the covering portion define a hollow space. The functional element is located in the hollow space. In the support body, a surface opposite to a surface facing the substrate is a first surface, and a portion of the protective layer is in contact with the first surface of the support body without the covering portion being interposed.

An electronic component includes a substrate, a functional element on the substrate, a support body, a covering portion, and a protective layer covering the covering portion. The support body is provided on the substrate and around a region in which the functional element is located. The covering portion faces the substrate and is supported by the support body. The substrate, the support body, and the covering portion define a hollow space. The functional element is located in the hollow space. In the support body, a surface opposite to a surface facing the substrate is a first surface, and a portion of the protective layer is in contact with the first surface of the support body without the covering portion being interposed.

A semiconductor module case formed by injection molding into a box shape using a mold open on a bottom thereof, includes an external terminal disposed on a top face or a side face of the case, the external terminal penetrating through the case from an inside to an outside thereof and being electrically connectable to a semiconductor element inside of the case, and a single first gate for a resin to enter the case. The case has a rectangular shape in a plan view of the case and has first and second short sides and first and second long sides, and the first gate is disposed at a side face of the first short side and has a flat surface area having a first width that extends along the first short side in a width direction of the case.

An encapsulated structure for a quantum resistance standard according to an embodiment of the present invention includes a base; an object disposed on the base and providing a measurement value of the quantum Hall resistance; two or more conductive lines connected to the object on one end; and a cap isolating the object from outside air.

Several embodiments of the present technology are described with reference to a semiconductor apparatus. In some embodiments of the present technology, a semiconductor apparatus includes a stack of semiconductor dies attached to a thermal transfer structure. The thermal transfer structure conducts heat away from the stack of semiconductor dies. Additionally, the assembly can include molded walls to support the thermal transfer structure.