A method and system for a power module is provided. The power module includes a first substrate including a first conductive substrate having a first plurality of power semiconductor switches arranged thereon, and at least one second conductive substrate electrically coupled to the first conductive substrate. A first terminal is electrically coupled to the first conductive substrate. The power module also includes a second substrate including a third conductive substrate having a second plurality of power semiconductor switches arranged thereon, and at least one fourth conductive substrate electrically coupled to the third conductive substrate. The third conductive substrate is electrically coupled to the second conductive substrate. A second terminal is electrically coupled to the fourth conductive substrate.

A wiring board includes: a metal plate having first and second surfaces opposite to each other, and having at least one through-hole penetrating through the first and second surfaces; at least one conductive via respectively disposed in the through-hole and spaced apart from the metal plate; an insulating structure including at least one through-insulating portion disposed between the through-hole and the conductive via, and a first insulating layer and a second insulating layer extending from the through-insulating portion and disposed in first regions surrounding the conductive via, on the first surface and the second surface, respectively; at least one first upper pad disposed on the first insulating layer and electrically connected to the conductive via; at least one first lower pad disposed on the second insulating layer and electrically connected to the conductive via; a second upper pad disposed on the first surface of the metal plate; and a second lower pad disposed on the second surface of the metal plate and electrically connected to the first upper pad through the metal plate.

An integrated circuit package may include a first conductive pad on an interposer substrate, and a second conductive pad formed on a front surface of an integrated circuit die. The second conductive pad may directly contact the first conductive pad on the interposer substrate. The integrated circuit package may further include a package substrate having a cavity, in which the interposer substrate and the integrated circuit are disposed in the cavity. The interposer substrate may include interconnect pathways that are electrically coupled to the first and second conductive pads. A heat spreader may subsequently form over the integrated circuit die and the package substrate.

A method for producing a package substrate for mounting a semiconductor device includes:

forming a first substrate by forming a laminate in which a first metal layer that has a thickness of 1 μm to 70 μm and that is peelable from a core resin layer, a first insulating resin layer, and a second metal layer are arranged on both sides of the core resin layer having a thickness of 1 μm to 80 μm, and heating and pressurizing the laminate simultaneously;

forming a pattern on the second metal layer;

forming a second substrate by heating and pressurizing a laminate formed by arranging a second insulating resin layer and a third metal layer on a surface of the second metal layer; and

peeling, from the core resin layer, a third substrate including the first metal and insulating resin layers, the second metal and insulating layers, and the third metal layer.

A carrier comprises: a main body made of a material comprising a thermal conductivity of at least 380 W/(m K), wherein the main body comprises a mounting surface for mechanical and thermal connection with a component, wherein the main body comprises a recess which penetrates the main body along a first direction perpendicular to the main extension plane of the main body, an electrically insulating filler is arranged in the recess, which comprises a further recess penetrating the filler along the first direction, an inner wall of the filler surrounding the further recess is provided with an electrically conductive coating to form a via through the main body.

Several embodiments of microelectronic configurations with logic components and associated methods of manufacturing are disclosed herein. In one embodiment, the configuration includes a substrate with a recess, a first die carried by the substrate wherein the die substantially covers the recess, and a logic component carried by the die in a location exposed by the recess. The logic component can be substantially coplanar with the substrate. The die is electrically connected to a terminal on a one side of the substrate, and the logic component is electrically connected to a terminal on an opposite side of the substrate.

A power semiconductor module includes a substrate of planar sheet metal including a plurality of islands that are each defined by channels that extend between upper and lower surfaces of the substrate, a first semiconductor die mounted on a first one of the islands, a molded body of encapsulant that covers the metal substrate, fills the channels, and encapsulates the first semiconductor die, a hole in the molded body that extends to a recess in the upper surface of the substrate, and a press-fit connector arranged in the hole such an interior end of the press-fit connector is mechanically and electrically connected to the substrate.

A device includes a first semiconductor chip that is arranged over a first carrier and includes a first electrical contact. The device further includes a second semiconductor chip arranged over a second carrier and including a second electrical contact arranged over a surface of the second semiconductor chip facing the second carrier. The second carrier is electrically coupled to the first electrical contact and the second electrical contact.

There are provide a metal/ceramic bonding substrate wherein the bonding strength of an aluminum plate bonded directly to a ceramic substrate is higher than that of conventional metal/ceramic bonding substrates, and a method for producing the same. The metal/ceramic bonding substrate is produced by a method including the steps of: arranging a ceramic substrate 10 in a mold 20; putting the mold 20 in a furnace; lowering an oxygen concentration to 25 ppm or less and a dew point to −45° C. or lower in the furnace; injecting a molten metal of aluminum into the mold 20 so as to allow the molten metal to contact the surface of the ceramic substrate 10; and cooling and solidifying the molten metal to form a metal plate 14 for circuit pattern of aluminum on one side of the ceramic substrate 10 to bond one side of the metal plate 14 for circuit pattern directly to the ceramic substrate 10, while forming a metal base plate 12 of aluminum on the other side of the ceramic substrate 10 to bond the metal base plate 12 directly to the ceramic substrate 10.

A substrate structure, a package structure, and a method for manufacturing an electronic package structure provided. The substrate structure includes a dielectric layer, a trace layer, and at least one wettable flank. The dielectric layer has a first surface and a second surface opposite to the first surface. The trace layer is embedded in the dielectric layer and exposed from the first surface of the dielectric layer. The at least one wettable flank is stacked with a portion of the trace layer embedded in the dielectric layer.