Patent classifications
H01L23/22
LOW FORCE LIQUID METAL INTERCONNECT SOLUTIONS
Embodiments disclosed herein include an electronic package. In an embodiment, the electronic package comprises a package substrate having a first surface and a second surface opposite from the first surface, and a die on the first surface of the package substrate. In an embodiment, the electronic package further comprises a socket interface on the second surface of the package substrate. In an embodiment, the socket interface comprises a first layer, wherein the first layer comprises a plurality of wells, a liquid metal within the plurality of wells, and a second layer over the plurality of wells.
LOW FORCE LIQUID METAL INTERCONNECT SOLUTIONS
Embodiments disclosed herein include an electronic package. In an embodiment, the electronic package comprises a package substrate having a first surface and a second surface opposite from the first surface, and a die on the first surface of the package substrate. In an embodiment, the electronic package further comprises a socket interface on the second surface of the package substrate. In an embodiment, the socket interface comprises a first layer, wherein the first layer comprises a plurality of wells, a liquid metal within the plurality of wells, and a second layer over the plurality of wells.
Electronic device and method of manufacturing an electronic device
An electronic device includes a substrate, at least one electronic element on the substrate, a heat dissipating pad on the substrate in thermal contact with the at least one electronic element, and including an encapsulated phase change material therein, and a bracket covering the substrate, the at least one electronic element and the heat dissipating pad.
Power Semiconductor Module Arrangement and Method for Producing the Same
A power semiconductor module arrangement comprises a substrate comprising a dielectric insulation layer, and a first metallization layer attached to the dielectric insulation layer, at least one semiconductor body mounted on the first metallization layer, and a first layer comprising an encapsulant, the first layer being arranged on the substrate and covering the first metallization layer the at least one semiconductor body, wherein the first layer is configured to release liquid or oil at temperatures exceeding a defined threshold temperature.
Packaging cover plate, organic light-emitting diode display and manufacturing method therefor
Disclosed are a packaging cover plate, an organic light-emitting diode display and a manufacturing method therefor. The packaging cover plate comprises: a cover plate body, the cover plate body being provided with open slots; cover plugs for covering openings at two ends of the open slots; and water absorption layers for at least covering mouths of the open slots. By means of the arranged open slots, the packaging cover plate can conveniently introduce a dry gas. In addition, the water absorption layers absorb water vapour, the introduced dry gas dries the water absorption layers, and the water vapour and oxygen in the water absorption layers can be taken away by means of the circular flow of the dry gas, so that damage to a device by water vapour and oxygen can be reduced, and the packaging effect is better.
Packaging cover plate, organic light-emitting diode display and manufacturing method therefor
Disclosed are a packaging cover plate, an organic light-emitting diode display and a manufacturing method therefor. The packaging cover plate comprises: a cover plate body, the cover plate body being provided with open slots; cover plugs for covering openings at two ends of the open slots; and water absorption layers for at least covering mouths of the open slots. By means of the arranged open slots, the packaging cover plate can conveniently introduce a dry gas. In addition, the water absorption layers absorb water vapour, the introduced dry gas dries the water absorption layers, and the water vapour and oxygen in the water absorption layers can be taken away by means of the circular flow of the dry gas, so that damage to a device by water vapour and oxygen can be reduced, and the packaging effect is better.
Vertical probe card
A probe card includes a circuit board and a probe set. The probe set is electrically coupled to the circuit board. Also, the probe set includes a plurality of probes. Each of the plurality of probes includes a plurality of nanotwinned copper pillars that are arranged in a predetermined crystal orientation. In addition, each of the plurality of probes further includes a tip. The tip substantially and electrically contacts a chip. Such that the circuit board can test the chip via the tip.
Power semiconductor module and composite module
A power semiconductor module includes a wiring member that electrically connects a front surface electrode of a semiconductor element and a circuit board of an insulating substrate in a housing. A resin provided in the housing covers the wiring member, and has a height in the vicinity of the wiring member. A cover covering the periphery of external terminals is provided between the resin and a first lid in the housing. A second lid is provided further outside the first lid in an aperture portion of the housing, and the space between the second lid and the first lid is filled with another resin.
LOW FORCE LIQUID METAL INTERCONNECT SOLUTIONS
Embodiments disclosed herein include an electronic package. In an embodiment, the electronic package comprises a package substrate having a first surface and a second surface opposite from the first surface, and a die on the first surface of the package substrate. In an embodiment, the electronic package further comprises a socket interface on the second surface of the package substrate. In an embodiment, the socket interface comprises a first layer, wherein the first layer comprises a plurality of wells, a liquid metal within the plurality of wells, and a second layer over the plurality of wells.
Packaged electronic devices with top terminations
An embodiment of an electronic device includes a circuit component (e.g., a transistor or other component) coupled to the top surface of a substrate. Encapsulation is formed over the substrate and the component. An opening in the encapsulation extends from the encapsulation top surface to a conductive feature on the top surface of the component. A conductive termination structure within the encapsulation opening extends from the conductive feature to the encapsulation top surface. The device also may include a second circuit physically coupled to the encapsulation top surface and electrically coupled to the component through the conductive termination structure. In an alternate embodiment, the conductive termination structure may be located in a trench in the encapsulation that extends between two circuits that are embedded within the encapsulation, where the conductive termination structure is configured to reduce electromagnetic coupling between the two circuits during device operation.