Embodiments of the present disclosure describe scalable package architecture of an integrated circuit (IC) assembly and associated techniques and configurations. In one embodiment, an integrated circuit (IC) assembly includes a package substrate having a first side and a second side disposed opposite to the first side, a first die having an active side coupled with the first side of the package substrate and an inactive side disposed opposite to the active side, the first die having one or more through-silicon vias (TSVs) configured to route electrical signals between the first die and a second die, and a mold compound disposed on the first side of the package substrate, wherein the mold compound is in direct contact with a sidewall of the first die between the active side and the inactive side and wherein a distance between the first side and a terminating edge of the mold compound that is farthest from the first side is equal to or less than a distance between the inactive side of the first die and the first side. Other embodiments may be described and/or claimed.

Reliability of a semiconductor device is improved. A slope is provided on a side face of an interconnection trench in sectional view in an interconnection width direction of a redistribution layer. The maximum opening width of the interconnection trench in the interconnection width direction is larger than the maximum interconnection width of the redistribution layer in the interconnection width direction, and the interconnection trench is provided so as to encapsulate the redistribution layer in plan view.

A resin produced by a conventional technique has a weak nature in terms of hydrolysis resistance. For example, in a case where the resin produced by a conventional technique is used in an area with a highly humid climate such as Japan for a long period of time, deterioration of the resin due to hydrolysis becomes a concern. A resin composition is described that is optimized in the molecular structure design of the resin and in the catalyst in order to improve the hydrolysis resistance. Specifically, the resin composition contains (1) a copolymer of a vinyl compound having two or more epoxy groups, a carboxylic acid anhydride, and a transesterification reaction catalyst, or (2) a copolymer of a vinyl compound having two or more carboxylic acid anhydride groups, an epoxy, and a transesterification reaction catalyst.

A resin having a small linear thermal expansion coefficient and a low absorbance is provided. The resin is characterized by including at least one structure selected from structures represented by the following general formulae (1) and (2):

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A manufacturing method of a mounting structure includes: a step of preparing a mounting member including a first circuit member and a plurality of second circuit members placed on the first circuit member; a disposing step of disposing a thermosetting sheet and a thermoplastic sheet on the mounting member, with the thermosetting sheet interposed between the thermoplastic sheet and the first circuit member; a first sealing step of pressing a stack of the thermosetting sheet and the thermoplastic sheet against the first circuit member, and heating the stack, to seal the second circuit members and to cure the thermosetting sheet into a cured layer; and a removal step of removing the thermoplastic sheet from the cured layer. At least one of the second circuit members is a hollow member having a space from the first circuit member, and in the first sealing step, the second circuit members are sealed so as to maintain the space.

An integrated circuit (IC) comprising an enhanced passivation scheme for pad openings and trenches is provided. In some embodiments, an interlayer dielectric (ILD) layer covers a substrate and at least partially defines a trench. The trench extends through the ILD layer from a top of the ILD layer to the substrate. A conductive pad overlies the ILD layer. A first passivation layer overlies the ILD layer and the conductive pad, and further defines a pad opening overlying the conductive pad. A second passivation layer overlies the ILD layer, the conductive pad, and the first passivation layer, and further lines sidewalls of the first passivation layer in the pad opening and sidewalls of the ILD layer in the trench. Further, the second passivation layer has a low permeability for moisture or vapor relative to the ILD layer.

An epoxy resin composition (A), having an epoxy resin represented by formula (1):

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and an epoxy resin represented by formula (2):

##STR00002##

where R.sup.1 is a linear aliphatic hydrocarbon group having 1 to 6 carbon atoms, and n is an integer of 0 or 1. An epoxy resin composition (B), having 100 parts by weight of the epoxy resin composition (A) and 0.01 to 1,000 parts by weight of a curing agent.

A photosensitive resin composition is also provided that includes a polymer precursor selected from a polyimide precursor and a polybenzoxazole precursor; a photo-radical polymerization initiator; and a solvent, in which an acid value of an acid group contained in the polymer precursor and having a neutralization point in a pH range of 7.0 to 12.0 is in a range of 2.5 to 34.0 mgKOH/g, and either the polymer precursor contains a radically polymerizable group or the photosensitive resin composition includes a radically polymerizable compound other than the polymer precursor.

An object is to provide a technique which suppresses peeling between a sealing resin and a semiconductor element while suppressing a decrease in productivity and an increase in manufacturing cost in a semiconductor device. A semiconductor device includes a semiconductor element, and a sealing resin sealing the semiconductor element. The semiconductor element includes a cell region through which a main current flows, a terminal region provided on an outer peripheral side of the cell region, and a protective film covering an upper surface of an outer peripheral portion of the terminal region. The protective film includes spread portions spreading to outermost ends at four corners of the semiconductor element. The spread portions have a cut section continuous with a cut section of the terminal region, and do not spread to the outermost ends in four sides excluding the four corners of the semiconductor element.

A packaged semiconductor includes an electrically insulating encapsulant body having an upper surface, a first semiconductor die encapsulated within the encapsulant body, the first semiconductor die having a main surface with a first conductive pad that faces the upper surface of the encapsulant body, a second semiconductor die encapsulated within the encapsulant body and disposed laterally side by side with the first semiconductor die, the second semiconductor die having a main surface with a second conductive pad that faces the upper surface of the encapsulant body, and a first conductive track that is formed in the upper surface of the encapsulant body and electrically connects the first conductive pad to the second conductive pad. The encapsulant body includes a laser activatable mold compound.