According to various aspects, exemplary embodiments are disclosed of thermal interface materials, electronic devices, and methods for establishing thermal joints between heat spreaders or lids and heat sources. In exemplary embodiments, a method of establishing a thermal joint for conducting heat between a heat spreader and a heat source of an electronic device generally includes positioning a thermal interface material (TIM1) between the heat spreader and the heat source.

According to various aspects, exemplary embodiments are disclosed of thermal interface materials, electronic devices, and methods for establishing thermal joints between heat spreaders or lids and heat sources. In exemplary embodiments, a method of establishing a thermal joint for conducting heat between a heat spreader and a heat source of an electronic device generally includes positioning a thermal interface material (TIM1) between the heat spreader and the heat source.

A method for producing a metal-ceramic substrate with electrically conductive vias includes: attaching a first metal layer in a planar manner to a first surface side of a ceramic layer; after attaching the first metal layer, introducing a copper hydroxide or copper acetate brine into holes in the ceramic layer delimiting a via, to form an assembly; converting the copper hydroxide or copper acetate brine into copper oxide; subjecting the assembly to a high-temperature step above 500° C. in which the copper oxide forms a copper body in the holes; and after converting the copper hydroxide or copper acetate brine into the copper oxide, attaching a second metal layer in a planar manner to a second surface side of the ceramic layer opposite the first surface side. The copper body produces an electrically conductive connection between the first and the second metal layers.

The present invention provides thermal interface materials for the interior, center, and exterior of an electronic component, wherein the interior thereof is a first contact interface between an electronic chip and an integrated heat spreader; the center thereof is a second contact interface between the electronic chip and a heatsink; and the exterior thereof is a third contact interface between the integrated heat spreader and the heatsink. The thermal interface material consists of: a first, a second, a third thermal conductive adhesive layer, along with a thin electrically conductive functional layer. The thin electrically conductive functional layer is at least a conductive foil, a conductive foil with a ceramic and/or graphene heat dissipation layer on one side thereof, and a conductive foil with a ceramic and/or graphene heat dissipation layer on two sides thereof; and is laminated between the first and the second thermal conductive adhesive layer.

A module arrangement for power semiconductor devices, includes two or more heat spreading layers with a first surface and a second surface being arranged opposite to the first surface. At least two or more power semiconductor devices are arranged on the first surface of the heat spreading layer and electrically connected thereto. An electrical isolation stack comprising an electrically insulating layer and electrically conductive layers is arranged in contact with the second surface of each heat spreading layer. The at least two or more power semiconductor devices, the heat spreading layers and a substantial part of each of the electrical isolation stacks are sealed from their surrounding environment by a molded enclosure. Accordingly, similar or better thermal characteristic of the module can be achieved instead of utilizing high cost electrically insulating layers, and double side cooling configurations can be easily implemented, without the use of a thick baseplate.

The resin-sealed semiconductor device is configured in such a way that a second bonding material has a higher melting point than a first bonding material made of a solder-bonding material has, in such a way that one of bonding surfaces in each of which a power module and a cooling device are bonded to each other with the first bonding material is the other surface portion of a copper plate, and the other one of the bonding surfaces is the surface portion, at the power module side, of the cooling device, and in such a way that the surface portion, at the power module side, of the cooling device is formed of copper or metal having solder wettability the same as or higher than solder wettability of copper.

Methods for attachment and devices produced using such methods are disclosed. In certain examples, the method comprises disposing a capped nanomaterial on a substrate, disposing a die on the disposed capped nanomaterial, drying the disposed capped nanomaterial and the disposed die, and sintering the dried disposed die and the dried capped nanomaterial at a temperature of 300° C. or less to attach the die to the substrate. Devices produced using the methods are also described.

Methods for attachment and devices produced using such methods are disclosed. In certain examples, the method comprises disposing a capped nanomaterial on a substrate, disposing a die on the disposed capped nanomaterial, drying the disposed capped nanomaterial and the disposed die, and sintering the dried disposed die and the dried capped nanomaterial at a temperature of 300° C. or less to attach the die to the substrate. Devices produced using the methods are also described.

Processing methods may be performed to form a fan-out interconnect structure. The methods may include forming a semiconductor active device structure overlying a first substrate. The semiconductor active device structure may include first conductive contacts. The methods may include forming an interconnect structure overlying a second substrate. The interconnect structure may include second conductive contacts. The methods may also include joining the first substrate with the second substrate. The joining may include coupling the first conductive contacts with the second conductive contacts. The interconnect structure may extend beyond the lateral dimensions of the semiconductor active device structure.

The present invention relates to a thermal conductive layer that includes at least one filler, has a thermal diffusivity of 5.0×10.sup.−7 m.sup.2s.sup.−1 or more, and has a volume resistivity of 1.0×10.sup.11 Ω.Math.cm or more. Further, the present invention relates to a photosensitive layer to which the thermal conductive layer is applied, a photosensitive composition, a manufacturing method for a thermal conductive layer, and a laminate and a semiconductor device.