A composite substrate includes, in this order: a ceramic plate; a metal layer containing at least one selected from the group consisting of aluminum and an aluminum alloy; and a thermal sprayed layer containing at least one selected from the group consisting of copper and a copper alloy, and an intermetallic compound containing copper and aluminum as constituent elements is scattered between the metal layer and the thermal sprayed layer.

The purpose of the present invention is to provide a sandwich structure that has both excellent heat dissipation properties and excellent mechanical properties. In order to achieve this purpose, the sandwich structure of the present invention has the following structure. The sandwich structure includes a core member (I), and a fiber reinforced member (II) disposed on both sides of the core member (I), wherein the core member (I) includes a sheet-shaped heat conductive member (III) having an in-plane thermal conductivity of 300 W/m.K or more.

A method for producing a power semiconductor system includes packaging a power device in plastic to form a power semiconductor component, forming a first heat dissipation face on a surface of the power semiconductor component; heating a first material between a first heat sink and the first heat dissipation face; and cooling the first material on the first heat dissipation face to connect the power semiconductor component and the first heat sink.

Implementations of semiconductor devices may include a die coupled over a lead frame, a redistribution layer (RDL) coupled over the die, a first plurality of vias coupled between the RDL and the die, and a second plurality of vias coupled over and directly to the lead frame. The second plurality of vias may be adjacent to an outer edge of the semiconductor device and may be electrically isolated from the die.

A semiconductor device includes: an insulated circuit substrate including a conductive plate on a top surface side; a semiconductor chip mounted on the conductive plate; a printed circuit board provided over and electrically connected to the semiconductor chip; a first external connection terminal electrically connected to the conductive plate and extending upward from the conductive plate; a first conductive block provided to surround an outer circumference of the first external connection terminal in an insulated state; and a sealing member provided to seal the semiconductor chip, the printed circuit board, and the first conductive block.

A semiconductor apparatus includes: a first semiconductor chip; a resin enclosure having a space in which the first semiconductor chip is positioned; a lead terminal disposed in the resin enclosure; a second semiconductor chip configured to: control the first semiconductor chip, and be disposed on a first portion of the resin enclosure, the resin enclosure not overlapping with the lead terminal, as seen in planar view from a direction perpendicular to a top surface of the lead terminal; and a wire having a first end connected to the lead terminal and a second end connected to the second semiconductor chip.

Exemplary package on package (PoP) assemblies may include a substrate. The PoP assemblies may include a first package positioned on a first side of the substrate with a bottom surface of the first package facing the substrate. The PoP assemblies may include a second package positioned on a second side of the substrate with a top surface of the second package facing the substrate. The second side may be positioned opposite the first side. The PoP assemblies may include a conductive element that contacts one or both of a top surface and the bottom surface of the second package and extends to a position that is aligned with or above a top surface of the first package.

Exemplary package on package (PoP) assemblies may include a substrate. The PoP assemblies may include a first package positioned on a first side of the substrate with a bottom surface of the first package facing the substrate. The PoP assemblies may include a second package positioned on a second side of the substrate with a top surface of the second package facing the substrate. The second side may be positioned opposite the first side. The PoP assemblies may include a conductive element that contacts one or both of a top surface and the bottom surface of the second package and extends to a position that is aligned with or above a top surface of the first package.

A semiconductor device includes a substrate, a package structure, a thermal interface material (TIM) layer, and a lid structure. The package structure is disposed on the substrate. The TIM layer is disposed on the package structure. The TIM layer includes a liquid state metal material. The lid structure is disposed on the substrate and the TIM layer. The lid structure includes a trench facing the package structure. At least a portion of the TIM layer is located in the trench.

The power module semiconductor device (2) includes: an insulating substrate (10); a first pattern (10a) (D) disposed on the insulating substrate (10); a semiconductor chip (Q) disposed on the first pattern; a power terminal (ST, DT) and a signal terminal (CS, G, SS) electrically connected to the semiconductor chip; and a resin layer (12) configured to cover the semiconductor chip and the insulating substrate. The signal terminal is disposed so as to be extended in a vertical direction with respect to a main surface of the insulating substrate.