A method of forming a semiconductor structure includes: attaching a semiconductor device to a first surface of a substrate; placing a thermal interface material (TIM) film over a first side of the semiconductor device distal from the substrate, where the TIM film is pre-formed before the placing, where after the placing, a peripheral portion of the TIM film extends laterally beyond sidewalls of the semiconductor device; and attaching a lid to the first surface of the substrate to form an enclosed space between the lid and the substrate, where after attaching the lid, the semiconductor device and the TIM film are disposed in the enclosed space, where a first side of the TIM film distal from the substrate contacts the lid.

A high conductance thermal link (1) includes a thermal conductive strap (2) having pyrolytic graphite layers arranged in stacks (5) and polyimide film (6) at least partially covering each stack (5). Adhesive material is between the pyrolytic graphite layers. The thermal conductive strap (2) has two opposite ends (4) and two end fittings (3, 3′) that house the corresponding ends (4) of the thermal conductive strap (2). An adhesive material is in the ends (4) of the thermal conductive strap (2) between the pyrolytic graphite layers and between the stacks (5) of pyrolytic graphite layers. At least one of the ends (4) of the thermal conductive strap (2) has a geometry including protrusions (7) separated by intermediate gaps (8).

A high conductance thermal link (1) includes a thermal conductive strap (2) having pyrolytic graphite layers arranged in stacks (5) and polyimide film (6) at least partially covering each stack (5). Adhesive material is between the pyrolytic graphite layers. The thermal conductive strap (2) has two opposite ends (4) and two end fittings (3, 3′) that house the corresponding ends (4) of the thermal conductive strap (2). An adhesive material is in the ends (4) of the thermal conductive strap (2) between the pyrolytic graphite layers and between the stacks (5) of pyrolytic graphite layers. At least one of the ends (4) of the thermal conductive strap (2) has a geometry including protrusions (7) separated by intermediate gaps (8).

An electronic element mounting substrate includes: a first substrate including a first principal face; a second substrate located inside the first substrate in a plan view of the electronic element mounting substrate, the second substrate being made of a carbon material; a third substrate located between the first substrate and the second substrate in the plan view, the third substrate being made of a carbon material; and a first mounting portion for mounting a first electronic element, the first mounting portion being located on the first principal face side in a thickness direction of the substrate. The second substrate and the third substrate each have a low heat conduction direction and a high heat conduction direction. The second substrate and the third substrate is arranged so that the low heat conduction directions thereof are perpendicular to each other, and the high heat conduction directions thereof are perpendicular to each other.

An electronic element mounting substrate includes: a first substrate including a first principal face; a second substrate located inside the first substrate in a plan view of the electronic element mounting substrate, the second substrate being made of a carbon material; a third substrate located between the first substrate and the second substrate in the plan view, the third substrate being made of a carbon material; and a first mounting portion for mounting a first electronic element, the first mounting portion being located on the first principal face side in a thickness direction of the substrate. The second substrate and the third substrate each have a low heat conduction direction and a high heat conduction direction. The second substrate and the third substrate is arranged so that the low heat conduction directions thereof are perpendicular to each other, and the high heat conduction directions thereof are perpendicular to each other.

A semiconductor device including a semiconductor chip disposed on a substrate having a conductive pattern, an insulating plate and a metal plate that are sequentially formed and respectively have the thicknesses of T2, T1 and T3. The metal plate has a plurality of depressions formed on a rear surface thereof. In a side view, a first edge face, which is an edge face of the conductive pattern, is at a first distance away from a second edge face that is an edge face of the metal plate, and a third edge face, which is an edge face of the semiconductor chip, is at a second distance away from the second edge face. Each depression is located within a depression formation distance from the first edge face, where: 0<depression formation distance≤(0.9×T1.sup.2/first distance), and/or (1.1×T1.sup.2/first distance)≤depression formation distance<second distance.

A device includes an interposer including an insulative layer between a lower metal layer and a first upper metal layer and a second upper metal layer, a semiconductor transistor die attached to the first upper metal layer and comprising a first lower main face and a second upper main face, with a drain or collector pad on the first main face and electrically connected to the first upper metal layer, a source or emitter electrode pad and a gate electrode pad on the second main face, a leadframe connected to the interposer and comprising a first lead connected with the first upper metal layer, a second lead connected with the source electrode pad, and a third lead connected with the second upper metal layer, and wherein an electrical connector that is connected between the gate electrode pad and the second upper metal layer is orthogonal to a first electrical connector.

A thermal interface structure for transferring heat from an electronic component to a system heat sink includes a stack of one or more layers of a stiff thermal interface material and one or more layers of a compliant thermal interface material stacked on and connected to the one or more layers of the compliant thermal interface material. In some embodiments, the thermal interface structure also may include one or more layers of a shape memory alloy and/or a collapsible encasement.

A thermal interface structure for transferring heat from an electronic component to a system heat sink includes a stack of one or more layers of a stiff thermal interface material and one or more layers of a compliant thermal interface material stacked on and connected to the one or more layers of the compliant thermal interface material. In some embodiments, the thermal interface structure also may include one or more layers of a shape memory alloy and/or a collapsible encasement.

A composite structure includes a first metal layer, a second metal layer, and a ceramic layer disposed therebetween. The ceramic layer has a first surface and a second surface opposite to each other and is adapted to absorb electromagnetic waves. The absorbance reaction range of the electromagnetic waves by the ceramic layer ranges from 100 MHz to 400 GHz. The first metal layer has an opening exposing the second surface. An inner sidewall of the first metal layer surrounds the opening. The orthographic projection of the second metal layer on the ceramic layer at least partially overlaps the orthographic projection of the opening on the ceramic layer. The thickness ratio of the first metal layer to the second metal layer is 1:1 to 1:2. The area ratio of the first metal layer to the second metal layer is 1:1.2 to 1:4. A package architecture including the composite structure is also provided.