A packaging technology in which power switching elements, such as field-effect transistors (FETs), can be oriented in a vertical position relative to the printed circuit board (PCB) on which the product is mounted. The power die including the switching element(s) can essentially stand “on end” so that they take up very little PCB area. Multiple dies can be positioned this way, and the dies can be attached to a heat sink structure, which is designed to take the heat generated by the dies onto the top of the package. The heat sink structure can be attached to a structure to route the power and analog signals properly to the desired pins/leads/balls of the finished product. Using these techniques can result in a significant increase in the power density (both PCB space and solution volume) of power switching elements, e.g., FETs.

A semiconductor package includes a die pad having a die attach surface, a first laterally separated and vertically offset from the die pad, a semiconductor die mounted on the die attach surface and comprising a first terminal on an upper surface of the semiconductor die, an interconnect clip that is electrically connected to the first terminal and to the first lead, and a heat spreader mounted on top of the interconnect clip. The interconnect clip includes a first planar section that interfaces with the upper surface of the semiconductor die and extends past an outer edge side of the die pad. The heat spreader covers an area of the first planar section that is larger than an area of the semiconductor die. The heat spreader laterally extends past a first outer edge side of the die pad that faces the first lead.

An electronic assembly includes an electronic package connected to a host circuit board. The electronic assembly includes interposer assemblies electrically connected to the electronic package. The electronic assembly includes cable modules coupled to upper separable interface of the interposer assemblies. The electronic assembly includes carrier assemblies configured to be coupled to an upper surface of the electronic package. Each carrier assembly includes a carrier base block and a carrier lid configured to hold at least one interposer assembly and at least one cable module. The carrier assemblies hold the cable modules with the module contacts in electrical connection with upper mating interfaces of the interposer contacts. The carrier assemblies hold lower mating interfaces of the interposer contacts in electrical connection with upper package contacts of the electronic package. The carrier assemblies are separately removable from the electronic package to separate the interposer assemblies from the electronic package.

A semiconductor package assembly includes a circuit board, a heat dissipating element and a semiconductor device. The circuit board includes a conductive pattern. The heat dissipating element is located on the circuit board, where the heat dissipating element is connected to the conductive pattern. The semiconductor device is located on the circuit board and next to the heat dissipating element, where the semiconductor device is thermally connected to the heat dissipating element through the conductive pattern.

Implementations of semiconductor packages may include a first substrate having two or more die coupled to a first side, a clip coupled to each of the two or more die on the first substrate and a second substrate having two or more die coupled to a first side of the second substrate. A clip may be coupled to each of the two or more die on the second substrate. The package may include a lead frame between the first substrate and the second substrate and a molding compound. A second side of each of the first substrate and the second substrate may be exposed through the molding compound. A perimeter of the first substrate and a perimeter of the second substrate may not fully overlap when coupled through the lead frame.

Provided is a snap fit heatsink lug configured to be fixed without soldering, and in case of soldering, configured to be soldered without swell or distortion. The snap fit heatsink lug includes a lug base where a heatsink is configured to be mounted on a top thereof, and a lug fixator provided at two ends of the lug base to fix the lug base to a printed circuit board, wherein the lug fixator includes a lug fixator base and a fixing pin which protrudes downward from a bottom of the lug fixator base and is inserted into the printed circuit board, the fixing pin includes a first fixing pin and a second fixing pin, and at least one of the first fixing pin or the second fixing pin has a stopper at an exposed location below the printed circuit board when inserted into the printed circuit board.

Provided herein are semiconductor packages with improved clamps. In some embodiments, a semiconductor package may include a housing having a wall extending from a main body, and a set of support walls extending from the wall. The semiconductor package may further include a clamp extending between the set of support walls, the clamp having a first planar section coupled to a first support wall of the set of support walls, a second planar section coupled to a second support wall of the set of support walls, and a third planar section between the first and second planar sections. The third planar section may include an opening operable to receive a fastener, and a plurality of stress relief openings.

A thermal interface for discrete semiconductor devices (such as IGBT's) having a thermally conductive structure, a PCB populated with discrete electronic components, and each of the discrete semiconductor devices having a housing extending beyond the edge of the PCB and in a direction substantially parallel to a plane of the PCB, and a clamp bar secured to the thermally conductive structure adapted to compressively secure each housing to the thermally conductive structure and adapted to maintain thermal contact between a surface of each housing and the surface of the thermally conductive structure. A thermally conductive and electrically insulative pad is positioned between the semiconductor device housing and the thermally conductive structure. A casing enclosing the interface and PCB includes the thermally conductive structure formed on a backwall of the casing.

An internal component and external interface arrangement for a cylindrical compact computing system is described that includes at least a structural heat sink having triangular shape disposed within a cylindrical volume defined by a cylindrical housing. A computing engine having a generally triangular shape is described having internal components that include a graphics processing unit (GPU) board, a central processing unit (CPU) board, an input/output (I/O) interface board, an interconnect board, and a power supply unit (PSU).

A thermal chamber includes a cavity that is enclosed by sides and one or more ports that expose the cavity within the thermal chamber. Each of the one or more ports is configured to receive a temperature control component having a solid physical structure and configured to transfer thermal energy to and from an electrical device exposed via the cavity. The thermal chamber includes a bottom side open area of the thermal chamber located below the one or more ports. The bottom side open area is configured to allow the temperature control component to contact the electrical device that is exposed via the bottom side open area.