A cryogenic electronic package includes a circuitized substrate, an interposer, a superconducting multichip module (SMCM) and at least one superconducting semiconductor structure. The at least one superconducting semiconductor structure is disposed over and coupled to the SMCM, and the interposer is disposed between the SMCM and the substrate. The SMCM and the at least one superconducting semiconductor structure are electrically coupled to the substrate through the interposer. A cryogenic electronic assembly including a plurality of cryogenic electronic packages is also provided.

A data center is cooled by a cryogenic cooling system which is wind driven, and powered by energy stored in the cryogenic liquid. The cooling occurs through downwardly passing cryogenic liquid which is recycled and pushed back to a top of a system in a cyclic manner.

Separating temperature domains in cooled systems, including: cooling at least one first component of a circuit board using a first cooling system; and conductively coupling the at least one first component to at least one second component using a superconductive portion of a power plane of the circuit board.

Embodiments have two approaches as follows: (1) Embedded PCB-based fabrication and (2) PCB assembly-based fabrication. An embedded printed circuit board (PCB) type approach involves the creation of a space of coolant direct interconnection, using immersion cooling to link on any type of power semiconductor device hot spots to convectively and evaporatively cool directly. This means fabricating PCB embedded channels, to utilize the microgap between die and PCB as the cooling channel. A printed circuit board (PCB) assembly embodiment includes a PCB having at least one heat generating component. A lid is mounted to the PCB, wherein the lid defines a cooling path therein extending in a coolant flow direction from an inlet end of the cooling path to an outlet end of the cooling path.

A semiconductor device includes a substrate; a first functional circuit attached to the substrate; a first thermal circuit attached to the substrate, configured to utilize cryogenic liquid to cool the first functional circuit; a second functional circuit attached to the substrate; and a second thermal circuit attached to the substrate, configured to cool the second functional circuit without using the cryogenic liquid.

Computing systems including heat sinks (e.g., a first and a second heatsink) and metal preforms (e.g., a first and a second metal preform) are provided. The first metal preform is bonded to a portion of the first heat sink, where the first metal preform is configured to conform to the at least a portion of a superconducting component when the superconducting component is pressed against the first metal preform and hold shape even after a first pressure on the first metal preform is relieved. The computing system includes a second metal preform bonded to a portion of the second heat sink, where the second metal preform is configured to conform to the at least the portion of a superconducting component when the superconducting component is pressed against the second metal preform and hold shape even after a second pressure on the second metal preform is relieved.

A cryogenic electronic package includes a first superconducting multi-chip module (SMCM), a superconducting interposer, a second SMCM and a superconducting semiconductor structure. The interposer is disposed over and coupled to the first SMCM, the second SMCM is disposed over and coupled to the interposer, and the superconducting semiconductor structure is disposed over and coupled to the second SMCM. The second SMCM and the superconducting semiconductor structure are electrically coupled to the first SMCM through the interposer. A method of fabricating a cryogenic electronic package is also provided.

Disclosed herein are fabrication techniques for providing metal gates in quantum devices, as well as related quantum devices. For example, in some embodiments, a method of manufacturing a quantum device may include providing a gate dielectric over a qubit device layer, providing over the gate dielectric a pattern of non-metallic elements referred to as gate support elements, and depositing a gate metal on sidewalls of the gate support elements to form a plurality of gates of the quantum device.

A sample cell is provided for holding a sample to be placed in a cryogenically cooled environment. The sample cell comprises an airtight, openable and closable enclosure. Within said enclosure is a sample base for receiving the sample. A refrigerator attachment is provided for attaching the sample cell to a refrigerated body of a cryogenically cooled environment. The sample cell comprises a thermal connection between the sample base and the refrigerator attachment. One or more airtight connectors are provided for establishing electric connections between inside and outside of said enclosure.

Disclosed herein are fabrication techniques for providing metal gates in quantum devices, as well as related quantum devices. For example, in some embodiments, a method of manufacturing a quantum device may include providing a gate dielectric over a qubit device layer, providing over the gate dielectric a pattern of non-metallic elements referred to as gate support elements, and depositing a gate metal on sidewalls of the gate support elements to form a plurality of gates of the quantum device.