H01L23/5227

Apparatus, system, and method for increased current distribution on high-density circuit boards

The disclosed current-distribution inductor may include (1) a magnetic core and (2) a conductor electrically coupled between a power source and an electrical component of a circuit board, wherein the conductor comprises (A) a bend that passes through the magnetic core and (B) a flying lead that extends from the bend to the electrical component of the circuit board and runs parallel with the circuit board. Various other apparatuses, systems, and methods are also disclosed.

SEMICONDUCTOR DEVICE WITH POLYGONAL INDUCTIVE DEVICE
20230127322 · 2023-04-27 ·

A semiconductor device includes: a polygonal inductive device disposed on a first layer on a substrate, the polygonal inductive device including a first line portion; a first conductive line disposed on a second layer on the substrate; a second conductive line disposed on a third layer on the substrate; and a first conductive via arranged to electrically couple the second conductive line to the first conductive line; wherein the first layer is different from the second layer and the third layer, the first conductive line is electrically connected to a reference voltage, and the first conductive line crosses the first line portion viewing from a top of the semiconductor device.

ISOLATOR
20220336580 · 2022-10-20 ·

An isolator includes first and second conductors, and first to third insulating film. The first insulating film is provided between the first and second conductors. The first insulating film has a first film thickness, and includes silicon, oxygen, and nitrogen. The second insulating film is provided between the first conductor and the first insulating film. The second insulating film includes silicon and oxygen. The second insulating film includes no nitrogen, or further includes nitrogen of a smaller composition ratio than a nitrogen composition ratio in the first insulating film. The third insulating film is provided between the first conductor and the second insulating film. The second and third insulating films has second and third film thicknesses, respectively. The second and third film thickness are less than the first film thickness. The third insulating film having a different composition from the compositions of the first and second insulating films.

INTEGRATED INDUCTOR INCLUDING MULTI-COMPONENT VIA LAYER INDUCTOR ELEMENT
20230128990 · 2023-04-27 · ·

A device includes an integrated inductor and metal interconnect formed in an integrated circuit (IC) structure. The integrated inductor includes an inductor wire having a portion defined by an inductor element stack including (a) a metal layer inductor element formed in a metal layer in the IC structure and (b) a multi-component via layer inductor element formed in a via layer in the IC structure vertically adjacent the metal layer, and conductively connected to the metal layer inductor element. The multi-component via layer inductor element includes a via layer inductor element cup-shaped component formed from a first metal, and a via layer inductor element fill component formed from a second metal in an opening defined by the via layer inductor element cup-shaped component. The metal interconnect includes a metal layer interconnect element formed in the metal layer, and an interconnect via formed in the via layer from the first metal.

INTEGRATED INDUCTOR WITH INDUCTOR WIRE FORMED IN AN INTEGRATED CIRCUIT LAYER STACK
20230129684 · 2023-04-27 · ·

A device includes (a) an integrated inductor having an inductor wire and (b) a metal interconnect arrangement, both formed in an integrated circuit layer stack of alternating metal layers and via layers. At least a portion of the inductor wire is defined by an inductor element stack including multiple metal layer inductor elements formed in multiple respective metal layers, and multiple via layer inductor elements formed in multiple respective via layers and conductively connected to the metal layer inductor elements. Each via layer inductor element has a length of at least 1 μm in each of two lateral directions orthogonal to each other and perpendicular to the vertical direction. The metal interconnect arrangement includes metal layer interconnect elements formed in the respective metal layers, and interconnect vias formed in the respective via layers.

Semiconductor device packages including an inductor and a capacitor

A semiconductor device package includes a substrate, a first patterned conductive layer, a second patterned conductive layer, a dielectric layer, a third patterned conductive layer and a connector. The substrate has a top surface. The first patterned conductive layer is on the top surface of the substrate. The second patterned conductive layer contacts the first patterned conductive layer. The second patterned conductive layer includes a first portion, a second portion and a third portion. The second portion is connected between the first portion and the third portion. The dielectric layer is on the top surface of the substrate. The dielectric layer covers the first patterned conductive layer and surrounds the second portion and the third portion of the second patterned conductive layer. The first portion of the second patterned conductive layer is disposed on the dielectric layer. The third patterned conductive layer is on the second patterned conductive layer, and the connector is directly on the third patterned conductive layer.

Reduction of OHMIC losses in monolithic chip inductors and transformers of radio frequency integrated circuits
11637063 · 2023-04-25 · ·

An inductor or transformer with the inductor can include one or more windings split into strands along a radial path of the winding and provide for a more uniform current distribution across a width of the winding. The winding(s) can comprise twisting components as twistings or strand crossings located at various locations along the winding. The twisting components span the winding along a winding width with a connector or crossing strand and change a position of one strand to another at points that different strands of the winding are cut or spliced.

Package-embedded thin-film capacitors, package-integral magnetic inductors, and methods of assembling same

A semiconductor package substrate includes an integral magnetic-helical inductor that is assembled during assembly of the semiconductor package substrate. The integral magnetic-helical inductor is located within a die footprint within the semiconductor package substrate.

Isolator and communication system

According to one embodiment, in an isolator, a first capacitive element is arranged on a first signal line. The first capacitive element has one end electrically connected to an input side circuit and having another end electrically connected to an output side circuit. A second capacitive element is arranged on a second signal line. The second capacitive element having one end electrically connected to the input side circuit and having another end electrically connected to the output side circuit. A first inductive element has one end electrically connected to a first node between the first capacitive element in the first signal line and the output side circuit. A second inductive element has one end electrically connected to a second node between the second capacitive element in the second signal line and the output side circuit.

Electric field grading protection design surrounding a galvanic or capacitive isolator

Micro-isolators exhibiting enhanced isolation breakdown voltage are described. The micro-isolators may include an electrically floating ring surrounding one of the isolator elements of the micro-isolator. The isolator elements may be capacitor plates or coils. The electrically floating ring surrounding one of the isolator elements may reduce the electric field at the outer edge of the isolator element, thereby enhancing the isolation breakdown voltage.