An electronic device comprises an air core inductor including an electronic semiconductor package including a first portion of the air core inductor internal to the electronic semiconductor package; and an electrically conductive layer arranged on a first external surface of the electronic semiconductor package and electrically connected as a second portion of the air core inductor.

An embedded passive chip device includes a chip body and a functional layered structure. The chip body has a circuit-forming surface that is formed with a recess. The functional layered structure is formed on the chip body and includes a conductive layer that has at least a portion which covers at least partially the circuit-forming surface, and a magnetic layer that is disposed within the recess and that is inductively coupled to the conductive layer for generating inductance. A method of making the embedded passive chip device is also disclosed.

An isolated power transfer device includes a transformer formed in a multi-layer substrate of an integrated circuit package. A primary winding of the transformer is coupled to a first integrated circuit to form a DC/AC power converter and a secondary winding of the transformer is coupled to a second integrated circuit to form an AC/DC power converter. The first and second integrated circuits are electrically isolated from each other. The first integrated circuit includes a lightly doped drain MOSFET integrated with conventional CMOS devices and the second integrated circuit includes a Schottky diode integrated with conventional CMOS devices. The isolated power transfer device includes a capacitive channel for communication of information across an isolation barrier from the second integrated circuit to the first integrated circuit. Capacitors of the capacitive channel may be formed in the multi-layer substrate of the integrated circuit package.

A method for packaging a semiconductor device used in an electronic apparatus having wireless charging function is provided. The method includes coupling a semiconductor device and a coil over a redistribution layer. The method further includes forming a molding material over the semiconductor device and the coil. The method also includes forming a conductive metal slot over the molding material. An opening is formed on the conductive metal slot for allowing magnetic flux to pass through.

A passive chip device includes a chip body, a conductive coil and a surface-mount contact unit. The chip body is in the form of a single piece, and has two opposite end faces and a first surface which is between the end faces. The conductive coil is deposited on and surrounding the chip body. The surface-mount contact unit includes two spaced apart conductive terminal contacts. Each of the terminal contacts extends from a respective one of the end faces to the first surface and connects to a respective one of end portions of the coil. The method of making the passive chip device is also disclosed.

An integrated circuit (IC) device may include a first substrate having an inductor ground plane in a conductive layer of the first substrate. The integrated circuit may also include a first inductor in a passive device layer of a second substrate that is supported by the first substrate. A shape of the inductor ground plane may substantially correspond to a silhouette of the first inductor.

A mechanism is provided to reduce noise effects on signals traversing bond wires of a SOC by forming a bond wire ring structure that decreases mutual inductance and capacitive coupling. Bond wires form the ring structure in a daisy chain connecting isolated ground leads at a semiconductor device package surrounding the semiconductor device. This structure reduces out-of-plane electromagnetic field interference generated by signals in lead wires, as well as mutual capacitance and mutual inductance.

According to various aspects, exemplary embodiments are disclosed of board level shields with virtual grounding capability. In an exemplary embodiment, a board level shield includes one or more resonators configured to be operable for virtually connecting the board level shield to a ground plane or a shielding surface. Also disclosed are exemplary embodiments of methods relating to making board level shields having virtual grounding capability. Additionally, exemplary embodiments are disclosed of methods relating to providing shielding for one or more components on a substrate by using a board level shield having virtual grounding capability. Further exemplary embodiments are disclosed of methods relating to making system in package (SiP) or system on chip (SoC) shielded modules and methods relating to providing shielding for one or more components of SiP or SoC module.

An electronic package comprises an integrated circuit (IC) configured to receive a power input signal and to deliver a regulated power output signal. A multilayer electrical routing structure is attached to the IC and is configured to couple the electronic package to an external circuit. The multilayer routing structure has one or more electrical conductors on each of at least two layers which are configured to route the power input signal from the external circuit to the IC and to route the regulated power output signal from the IC to the external circuit. The one or more electrical conductors form an integrated inductive device having a respective portion disposed on each of the at least two layers and the power output signal is coupled to the external circuit through the integrated inductive device.

An information processing device that includes a coil antenna is configured to receive an external magnetic field and thereby generate power, and a first IC chip and a second IC chip each connected in parallel to the coil antenna and configured to receive power supplied from the coil antenna. Power received by the first IC chip from the coil antenna is different from power received by the second IC chip from the coil antenna.