A semiconductor package includes a package substrate, a logic chip stacked on the package substrate and including at least one logic element, and a stack structure. The stack structure includes an integrated voltage regulator (IVR) chip including a voltage regulating circuit that regulates a voltage of the at least one logic element, and a passive element chip stacked on the IVR chip and including an inductor.

A semiconductor device includes a first terminal, a second terminal, a first chip, and a resistance part. The first chip includes a substrate electrically connected to the second terminal, a nitride semiconductor layer located on the substrate, a first drain electrode located on the nitride semiconductor layer and electrically connected to the first terminal, a first source electrode located on the nitride semiconductor layer and electrically connected to the second terminal, and a substrate capacitance between the first drain electrode and the substrate. The resistance part is connected in series in a path including the substrate capacitance between the first drain electrode and the second terminal.

The disclosed current-distribution inductor may include (1) a magnetic core and (2) a conductor electrically coupled between a power source and an electrical component of a circuit board, wherein the conductor comprises (A) a bend that passes through the magnetic core and (B) a flying lead that extends from the bend to the electrical component of the circuit board and runs parallel with the circuit board. Various other apparatuses, systems, and methods are also disclosed.

A switching component configured to switch an electrical signal, the switching component includes a substrate bearing several elementary components each ensuring the switching of the electrical signal, a baseplate onto which the substrate is fixed, the baseplate being configured to discharge heat emitted in the switchings of the switching component, two electrical conductors each connected to one of the elementary components and respectively ensuring the input and the output of the elementary component concerned for the signal (I.sub.C) to be switched, a magnetic core produced in a ferromagnetic material, the magnetic core surrounding the elementary component concerned without surrounding others of the elementary components and being disposed in the component in such a way that a displacement current between the surrounded elementary component and the baseplate induces a magnetic induction in the magnetic core, and in such a way that the path followed by a conduction current of the electrical signal switched by the component does not form a turn around the magnetic core.

A semiconductor device package includes a substrate, a first patterned conductive layer, a second patterned conductive layer, a dielectric layer, a third patterned conductive layer and a connector. The substrate has a top surface. The first patterned conductive layer is on the top surface of the substrate. The second patterned conductive layer contacts the first patterned conductive layer. The second patterned conductive layer includes a first portion, a second portion and a third portion. The second portion is connected between the first portion and the third portion. The dielectric layer is on the top surface of the substrate. The dielectric layer covers the first patterned conductive layer and surrounds the second portion and the third portion of the second patterned conductive layer. The first portion of the second patterned conductive layer is disposed on the dielectric layer. The third patterned conductive layer is on the second patterned conductive layer, and the connector is directly on the third patterned conductive layer.

According to one embodiment, in an isolator, a first capacitive element is arranged on a first signal line. The first capacitive element has one end electrically connected to an input side circuit and having another end electrically connected to an output side circuit. A second capacitive element is arranged on a second signal line. The second capacitive element having one end electrically connected to the input side circuit and having another end electrically connected to the output side circuit. A first inductive element has one end electrically connected to a first node between the first capacitive element in the first signal line and the output side circuit. A second inductive element has one end electrically connected to a second node between the second capacitive element in the second signal line and the output side circuit.

In one example, an apparatus comprises: a first metal layer including a first segment and a second segment, in which the first segment is electrically coupled to a single-ended signal terminal, the second segment has a disconnected end; a second metal layer including a third segment and a fourth segment, in which the third segment is magnetically coupled to the first segment, the fourth segment is magnetically coupled to the second segment, a first end of the third segment and a first end of the fourth segment are electrically coupled at a center tap, and a second end of the third segment and a second end of the fourth segment are electrically coupled to respective first and second signal terminals of a pair of differential signal terminals; and a phase adjustment device proximate the center tap and electrically coupled to a second voltage reference terminal.

Microelectronic devices having stacked electromagnetic coils are disclosed. In one example, a microelectronic device can include a first semiconductor element and a second semiconductor element disposed on the first semiconductor element. The microelectronic device can also include an electromagnetic coil. A first portion of the electromagnetic coil and a second portion of the electromagnetic coil may be spaced apart by the first semiconductor element. A first conductive via extending through the first semiconductor element may connect the first and second portions of the electromagnetic coil. Methods for forming such microelectronic devices are also disclosed.

Disclosed are redistribution substrates and semiconductor packages including the same. The semiconductor package comprises a redistribution substrate, a semiconductor chip mounted on the redistribution substrate, and an inductor structure in the redistribution substrate and electrically connected to the semiconductor chip. The inductor structure includes an outer coil pattern including a plurality of vertical parts and a horizontal part that connects the plurality of vertical parts to each other, and an inner coil pattern between the vertical parts and electrically connected to the outer coil pattern. The horizontal part includes a first conductive layer, and a second conductive layer between the first conductive layer and the inner coil pattern. The second conductive layer has a thickness that is less than a thickness of the first conductive layer.

The present disclosure is directed generally to semiconductor packages, semiconductor package substrates, and methods for making them, which include packages substrates with embedded passive devices positioned between plated through hole vias configured for an improved power delivery network.