H01L24/28

System and method for sub-column parallel digitizers for hybrid stacked image sensor using vertical interconnects
11973090 · 2024-04-30 · ·

Embodiments of a hybrid imaging sensor and methods for pixel sub-column data read from the within a pixel array.

Adhesive Substrate and Method for Separating an Object from an Adhesive Substrate
20190327838 · 2019-10-24 ·

An adhesive substrate is disclosed, which includes a base substrate and a heat-resistant elastomer layer formed on the base substrate, wherein the base substrate is flexible and has a thickness of 0.2 mm or more and 2 mm or less, wherein the adhesive substrate is used as part of a method for physically separating an object that has been held immovable in such a manner that the object has been adhered to by the heat-resistant elastomer layer and the object is anchored from the upper side, and wherein by starting to physically separate the end portion of the adhesive substrate downward the object is able to be separated.

SEMICONDUCTOR DEVICE
20190318990 · 2019-10-17 ·

A semiconductor device includes a wiring substrate provided with a plurality of pads electrically connected to a semiconductor chip in a flip-chip interconnection. The wiring substrate includes a pad forming layer in which a signal pad configured to receive transmission of a first signal and a second pad configured to receive transmission of a second signal different from the first signal are formed and a first wiring layer located at a position closest to the pad forming layer. In the wiring layer, a via land overlapping with the signal pad, a wiring connected to the via land, and a wiring connected to the second pad and extending in an X direction are formed. In a Y direction intersecting the X direction, a width of the via land is larger than a width of the wiring. A wiring is adjacent to the via land and overlaps with the signal pad.

FILM-TYPE SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

A film-type semiconductor package includes a metal lead portion arranged on a film substrate, a semiconductor chip including a pad, and a bump connecting the metal lead portion to the pad of the semiconductor chip. The bump includes a metal pillar arranged on the pad and including a first metal and a soldering portion arranged on an entire surface of the metal pillar, bonded to the metal lead portion, and including the first metal and a second metal that is different from the first metal.

LED CHIPS, METHOD OF MANUFACTURING THE SAME, AND DISPLAY PANELS
20190273184 · 2019-09-05 ·

An LED chip provided by an embodiment includes a first semiconductor layer; an active layer and a second semiconductor layer located sequentially on the first semiconductor layer. A first contact electrode extends through the active layer and the second semiconductor layer and is electrically connected to the first semiconductor layer; a second contact electrode is located on the second semiconductor layer and is electrically connected to the second semiconductor layer; a first extension electrode is located on the first contact electrode and is electrically connected to the first contact electrode, the first extension electrode comprises a plurality of concave spots for soldering; and a second extension electrode is located on the second contact electrode, electrically connected to the second contact electrode and isolated from the first extension electrode, and the second extension electrode includes a plurality of concave spots for soldering.

Raised Via for Terminal Connections on Different Planes

A method includes forming a metal layer extending into openings of a dielectric layer to contact a first metal pad and a second metal pad, and bonding a bottom terminal of a component device to the metal layer. The metal layer has a first portion directly underlying and bonded to the component device. A raised via is formed on the metal layer, and the metal layer has a second portion directly underlying the raised via. The metal layer is etched to separate the first portion and the second portion of the metal layer from each other. The method further includes coating the raised via and the component device in a dielectric layer, revealing the raised via and a top terminal of the component device, and forming a redistribution line connecting the raised via to the top terminal.

Fan-Out Structure and Method of Fabricating the Same

A semiconductor device includes a first die extending through a molding compound layer, a first dummy die having a bottom embedded in the molding compound layer, wherein a height of the first die is greater than a height of the first dummy die, and an interconnect structure over the molding compound layer, wherein a first metal feature of the interconnect structure is electrically connected to the first die and a second metal feature of the interconnect structure is over the first dummy die and extends over a sidewall of the first dummy die.

Integrated system-in-package with radiation shielding

A system in a package (SIP) includes carrier layer regions that have a dielectric material with a metal post therethrough, where adjacent carrier layer regions define a gap. A driver IC die is positioned in the gap having nodes connected to bond pads exposed by openings in a top side of a first passivation layer, with the bond pads facing up. A dielectric layer is on the first passivation layer and carrier layer region that includes filled through vias coupled to the bond pads and to the metal post. A light blocking layer is on sidewalls and a bottom of the substrate. A first device includes a light emitter that has first bondable features. The light blocking layer can block at least 90% of incident light. The first bondable features are flipchip mounted to a first portion of the bond pads.

Anisotropic conductive film, method for producing anisotropic conductive film, method for producing connection body, and connection method
10373926 · 2019-08-06 · ·

To reduce substrate warp occurring after connection an anisotropic conductive film is used. An anisotropic conductive film has: a first insulating adhesive layer; a second insulating adhesive layer; and a conductive particle-containing layer sandwiched by the first insulating adhesive layer and the second insulating adhesive layer and having conductive particles contained in an insulating adhesive, wherein air bubbles are contained between the conductive particle-containing layer and the first insulating adhesive layer, and, the conductive particle-containing layer, a portion thereof below the conductive particles and in contact with the second insulating adhesive layer has a lower degree of cure than other portions thereof.

Metal pillar in a film-type semiconductor package

A film-type semiconductor package includes a metal lead portion arranged on a film substrate, a semiconductor chip including a pad, and a bump connecting the metal lead portion to the pad of the semiconductor chip. The bump includes a metal pillar arranged on the pad and including a first metal and a soldering portion arranged on an entire surface of the metal pillar, bonded to the metal lead portion, and including the first metal and a second metal that is different from the first metal.