An antenna module includes an antenna substrate including a glass substrate having first and second surfaces opposing each other, an antenna pattern disposed on the first surface, and a wiring structure connected to the antenna pattern and extending to the second surface, and a semiconductor package including a semiconductor chip, having an inactive surface and an active surface, on which a connection pad is disposed, an encapsulant encapsulating the semiconductor chip, a connection member including a redistribution layer connected to the connection pad, and a through-via penetrating the encapsulant and connecting the redistribution layer and the wiring structure to each other.

Stacked semiconductor dies for semiconductor device assemblies and associated methods and systems are disclosed. In some embodiments, the semiconductor die assembly includes a substrate with a first opening in an inner portion and a second opening in an outer portion of the substrate. Further, the semiconductor die assembly can include a master die attached to a front side of the substrate, where the master die includes a first bond pad proximate to the first opening and a second bond pad proximate to the second opening. The first and second bond pads of the master die can be coupled with first and second substrate bond pads on a back side of the substrate, opposite to the front side, using first and second bonding wires extending through the first and second openings, respectively.

A device includes a die stack including a first die including a quantum circuit and a second die including an electronic circuit. The second die and the first die face each other. The device also includes a first interconnect between the quantum circuit and the electronic circuit and a second interconnect between the quantum circuit and the electronic circuit.

Apparatuses relating generally to a vertically integrated microelectronic package are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface. A first microelectronic device is coupled to the upper surface of the substrate. The first microelectronic device is a passive microelectronic device. First wire bond wires are coupled to and extend away from the upper surface of the substrate. Second wire bond wires are coupled to and extend away from an upper surface of the first microelectronic device. The second wire bond wires are shorter than the first wire bond wires. A second microelectronic device is coupled to upper ends of the first wire bond wires and the second wire bond wires. The second microelectronic device is located above the first microelectronic device and at least partially overlaps the first microelectronic device.

An integrated circuit isolation product includes a first integrated circuit die. The first integrated circuit die includes a first terminal and a second terminal adjacent to the first terminal. The first terminal and the second terminal are configured as a differential pair of terminals configured to communicate a differential signal across an isolation barrier. The first integrated circuit die includes at least one additional terminal adjacent to the differential pair of terminals. The at least one additional terminal is disposed symmetrically with respect to the differential pair of terminals. The first terminal may have a first parasitic capacitance and the second terminal may have a second parasitic capacitance. The first parasitic capacitance may be substantially the same as the second parasitic capacitance. The at least one additional terminal may be disposed symmetrically with respect to a line of symmetry for the differential pair of terminals.

A module assembly includes an adapter substrate with at least one cavity and a surface mounted die mounted on a top surface of the adapter substrate. The first cavity extends through the adapter substrate and has at least one first side wall. A first metallization layer is provided within the cavity. A first recessed die is attached to the first metallization layer and mounted within the cavity such that the first recessed die is at least partially recessed into the first cavity and surrounded by a gap filler that resides between side portions of the first recessed die and the at least one first side wall. The top surface of the gap filler is flush with the top surface of the adapter substrate and a top surface of the first recessed die.

A voltage determination device includes: a printed wiring board on which first to third substrate terminals are arranged in substantially one line; first and second voltage determination circuits mounted on the printed wiring board and disposed on a first side of the printed wiring board divided by a line passing through the first to third substrate terminals; a first printed wiring connecting the first substrate terminal and the first voltage determination circuit; a second printed wiring connecting the second substrate terminal and the first voltage determination circuit; a third printed wiring connecting the third substrate terminal and the second voltage determination circuit; and a fourth printed wiring connecting the second substrate terminal and the second voltage determination circuit, in which the first to fourth printed wirings are provided without intersecting each other and without bypassing a second side of the printed wiring board divided by the first arrangement line.

A module assembly includes an adapter substrate with at least one cavity and a surface mounted die mounted on a top surface of the adapter substrate. The first cavity extends through the adapter substrate and has at least one first side wall. A first metallization layer is provided within the cavity. A first recessed die is attached to the first metallization layer and mounted within the cavity such that the first recessed die is at least partially recessed into the first cavity and surrounded by a gap filler that resides between side portions of the first recessed die and the at least one first side wall. The top surface of the gap filler is flush with the top surface of the adapter substrate and a top surface of the first recessed die.

Provided is a light-emitting diode (LED) module, LED panel and LED screen. The LED module includes a composite layer, at least one LED chipset with an LED chip, at least one driver integrated circuit (IC); the composite layer includes a substrate arranged at the front side; the LED chip and the driver IC are installed at the front side of the composite layer, the cathode of the LED chip is connected to the driver IC by golden wire bonding; blind holes are arranged at the front side of the composite layer, the anode of the LED chip is connected to the positive electrode inside the composite layer through one of the blind holes; the wire coming from the VDD pin of the driver IC is connected to the positive electrode inside the composite layer through at least one of the blind holes; the wire coming from the GND pin of the driver IC is connected to the negative electrode inside the composite layer through one of the blind holes; the at least one driver IC is connected with each other through a signal line.

Provided is a light-emitting diode (LED) module, LED panel and LED screen. The LED module includes a composite layer, at least one LED chipset with an LED chip, at least one driver integrated circuit (IC); the composite layer includes a substrate arranged at the front side; the LED chip and the driver IC are installed at the front side of the composite layer, the cathode of the LED chip is connected to the driver IC by golden wire bonding; blind holes are arranged at the front side of the composite layer, the anode of the LED chip is connected to the positive electrode inside the composite layer through one of the blind holes; the wire coming from the VDD pin of the driver IC is connected to the positive electrode inside the composite layer through at least one of the blind holes; the wire coming from the GND pin of the driver IC is connected to the negative electrode inside the composite layer through one of the blind holes; the at least one driver IC is connected with each other through a signal line.