A driving mechanism including a first rod (103a), a second rod (104a), a first planar motor (106) moving on a plane, a center planar motor (105) moving on the plane and a moving portion (101), in which one end of the first rod is rotatably connected to the moving portion by a first rotation fulcrum (125a), the other end of the first rod is rotatably connected to the first planar motor by a second rotation fulcrum (126a), one end of the second rod is rotatably connected by a third rotation fulcrum (128a) provided on the first rod. The other end of the second rod is rotatably connected to the center planar motor by a fourth rotation fulcrum (127a), and the moving portion is moved so as to recede from the center planar motor when the first planar motor is moved near to the center planar motor.

A method for forming solder deposits on elevated contact metallizations of terminal faces of a substrate formed in particular as a semiconductor component includes bringing wetting surfaces of the contact metallizations into physical contact with a solder material layer. The solder material is arranged on a solder material carrier. At least for the duration of the physical contact, a heating of the substrate and a tempering of the solder material layer takes place. Subsequently a separation of the physical contact between the contact metallizations wetted with solder material and the solder material layer takes place.

A tool and a method of reflow are provided. In various embodiments, the tool includes a chamber unit, a wafer lifting system, a heater, and an exhausting unit. The wafer lifting system is disposed in the chamber unit. The heater is coupled to the chamber unit, and configured to heat the wafer. The exhausting unit coupled to the chamber unit, and configured to exhaust gas in the chamber unit. The wafer lifting system is configured to receive and move the wafer in the chamber unit, and to provide a vertical distance between the heater and the wafer in the chamber unit.

At least one circuit element may be formed on a front side of a ringed substrate, and the ringed substrate may be mounted on a mounting chuck. The mounting chuck may have an inner raised portion configured to receive the thinned portion of the substrate thereon, and a recessed ring around a perimeter of the mounting chuck configured to receive the outer ring of the ringed substrate therein. At least one solder bump may be formed that is electrically connected to the at least one circuit element, while the ringed wafer is disposed on the mounting chuck.

In this mounting device (10) for mounting a semiconductor chip (100) on a substrate (104), a controller (50) is provided with: a mounter for pressing the semiconductor chip (100) to the substrate (104) in a state where a cover film (110) is interposed between the semiconductor chip (100) and a thermocompression tool (16), and for heating and then cooling the thermocompression tool (16) to mount the semiconductor chip (100) on the substrate (104); and a separator for heating the thermocompression tool (16) after the semiconductor chip (100) has been mounted, and for raising a mounting head (17) to be separated from the cover film (110).

A solder member mounting method includes providing a substrate having bonding pads formed thereon, detecting a pattern interval of the bonding pads, selecting one of solder member attachers having different pattern intervals from each other, such that the one selected solder member attacher of the solder member attachers has a pattern interval corresponding to the detected pattern interval of the bonding pads, and attaching solder members on the bonding pads of the substrate, respectively, using the one selected solder member attacher.

To optimize a location of a power feeding point with the use of a square substrate. There is disclosed a method for determining a location of a power feeding point in an electroplating apparatus. The electroplating apparatus is configured to plate a rectangular substrate having a substrate area of S. The rectangular substrate has opposed two sides coupled to a power supply. The rectangular substrate has a length L of the sides coupled to the power supply and a length W of sides not coupled to the power supply meeting a condition of 0.8×L≤W≤L. The method includes determining a number N of the power feeding points according to the substrate area S.

Microelectronic devices and method of forming a plurality of microelectronic devices on a semiconductor workpiece are disclosed herein. One such method includes placing a plurality of first interconnect elements on a side of a semiconductor workpiece, forming a layer on the side of the workpiece, reshaping the first interconnect elements by heating the first interconnect elements, and coupling a first portion of a plurality of individual second interconnect elements to corresponding first interconnect elements with a second portion of the individual second interconnect elements exposed.

A semiconductor processing apparatus includes a process chamber that defines an enclosure. The enclosure includes a substrate support configured to support a substrate and rotate the substrate about a central axis of the process chamber. The substrate support is also configured to move vertically along the central axis and position the substrate at multiple locations in the enclosure. The apparatus also includes one or more UV lamps configured to irradiate a top surface of the substrate supported on the substrate support.

A semiconductor wafer has an edge support ring around a perimeter of the semiconductor wafer and conductive layer formed over a surface of the semiconductor wafer within the edge support ring. A first stencil is disposed over the edge support ring with first openings aligned with the conductive layer. The first stencil includes a horizontal portion over the edge support ring, and a step-down portion extending the first openings to the conductive layer formed over the surface of the semiconductor wafer. The horizontal portion may have a notch with the edge support ring disposed within the notch. A plurality of bumps is dispersed over the first stencil to occupy the first openings over the conductive layer. A second stencil is disposed over the edge support ring with second openings aligned with the conductive layer to deposit a flux material in the second openings over the conductive layer.