In one embodiment, an electronic system includes a printed circuit board, one or more packaged semiconductor devices, and a vapor chamber having a top and a bottom and enclosing a sealed cavity that is partially filled with a coolant. The vapor chamber comprises a thermo-conductive and electro-conductive material. The top of the vapor chamber has one or more depressions formed therein, each depression receiving and thermo-conductively connected to at least part of a bottom of a corresponding packaged semiconductor device, which is mounted through a corresponding aperture in the PCB. A heat sink may be thermo-conductively attached to the bottom of the vapor chamber.

A wiring substrate includes a core substrate and a cavity extending through the core substrate. The cavity has a planar shape that is rectangular, and includes corners and sides connecting the corners in a plan view. The wiring substrate also includes first through holes that extend through the core substrate and are spaced apart from the cavity. An electronic component is arranged in the cavity. The wiring substrate also includes a first insulating material with which the first through holes are filled and a second insulating material with which a gap between the electronic component and walls of the cavity is filled. The first through holes are arranged around the corners of the cavity in a plan view. Each of the first through holes is L-shaped in a plan view and formed continuously along two of the sides of the cavity that define the corresponding corner.

Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.

The present invention relates to a module that has a lower component of a module (1) having a material (3) in which at least one first structural element (4) is embedded, and an upper component of a module (2) having a material (3) in which at least a second component (16) is embedded. The upper component of the module (2) and the lower component of the module (1) are stacked, with the lower and the upper component of the module (2) being electrically connected and mechanically linked to each other. In addition, the present invention relates to a simple and cost-effective process for the production of a variety of modules. The invention makes it possible for the modules to be miniaturized with respect to surface and height and/or makes it possible to achieve greater integration by 3D packaging.

A cooler includes a cooling pipe having a cooling surface in contact with a heat-exchanged component, and a refrigerant passage. A pair of outer passages are formed between a pair of opposed inner wall surfaces which are located at both ends of an inner wall surface of the cooling pipe in a perpendicular direction and which constitute the refrigerant passage, and a pair of partition walls that are located at both ends of an inner fin in the perpendicular direction. At least one flow-regulating rib is formed in the refrigerant passage to project into the refrigerant passage at a position inward of the pair of outer passages in the perpendicular direction and at a position outward of an inflow hole and a discharge hole in the perpendicular direction as well as at a position outward of the inner fin in an arrangement direction and at a position inward of the inflow hole and the discharge hole in the arrangement direction. The flow-regulating rib is configured to restrict flow rates of refrigerant through the pair of outer passages.

A semiconductor module is provided, including: a cooling-target device; a first cooling unit on which the cooling-target device is placed and that has a flow channel through which a refrigerant for cooling the cooling-target device flows; and a second cooling unit to which the first cooling unit is fixed and that has a flow channel coupled with the flow channel of the first cooling unit. Also, a semiconductor module manufacturing method is provided, including: placing a cooling-target device on a first cooling unit that has a flow channel through which a refrigerant for cooling the cooling-target device flows; and fixing the first cooling unit to a second cooling unit that has a flow channel coupled with the flow channel of the first cooling unit.

A semiconductor device, including a plurality of semiconductor units disposed in a matrix, and a capsule encapsulating the plurality of semiconductor units. Each semiconductor unit includes a semiconductor element and another capsule encapsulating the semiconductor element. Each semiconductor unit further has a plurality of convex portions formed on a front surface thereof, and an engagement portion through which the semiconductor unit engages with at least one of the other semiconductor units.

Stacked microelectronic devices and methods for manufacturing such devices are disclosed herein. In one embodiment, a stacked microelectronic device assembly can include a first known good packaged microelectronic device including a first interposer substrate. A first die and a first through-casing interconnects are electrically coupled to the first interposer substrate. A first casing at least partially encapsulates the first device such that a portion of each first interconnect is accessible at a top portion of the first casing. A second known good packaged microelectronic device is coupled to the first device in a stacked configuration. The second device can include a second interposer substrate having a plurality of second interposer pads and a second die electrically coupled to the second interposer substrate. The exposed portions of the first interconnects are electrically coupled to corresponding second interposer pads.

There are disclosed herein various implementations of a compact high-voltage semiconductor package. In one exemplary implementation, such a semiconductor package includes a power transistor, as well as a drain contact, a source contact, and a gate contact to provide external connections to the power transistor. The semiconductor package also includes a contour element formed between the drain contact and the source contact in the semiconductor package. The contour element increases a creepage distance between the drain contact and the source contact in the semiconductor package so as to increase a breakdown voltage of the semiconductor package.

A power semiconductor module includes a wiring member that electrically connects a front surface electrode of a semiconductor element and a circuit board of an insulating substrate in a housing. A resin provided in the housing covers the wiring member, and has a height in the vicinity of the wiring member. A cover covering the periphery of external terminals is provided between the resin and a first lid in the housing. A second lid is provided further outside the first lid in an aperture portion of the housing, and the space between the second lid and the first lid is filled with another resin.