Patent classifications
H01L29/24
ARRAY SUBSTRATE AND MANUFACTURE METHOD THEREOF
A method for manufacturing an array substrate is provided. The array substrate, by providing a black matrix and a color resist layer on the array substrate and providing the color resist layer on the TFT layer, prevents bad influences on the color resist layer caused by a high temperature TFT process so as to provide a liquid crystal panel with improved displaying quality. The method includes, firstly, forming a black matrix on a substrate, and secondly, implementing a TFT manufacture process on the black matrix, and then forming a color resist layer after the TFT manufacture process. Accordingly, forming both the black matrix and the color resist layer on the array substrate can be achieved, where the color resist layer is formed after the TFT manufacture process to prevent bad phenomenon caused by the high temperature of the TFT process.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
After a sputtering gas is supplied to a deposition chamber, plasma including an ion of the sputtering gas is generated in the vicinity of a target. The ion of the sputtering gas is accelerated and collides with the target, so that flat-plate particles and atoms of the target are separated from the target. The flat-plate particles are deposited with a gap therebetween so that the flat plane faces a substrate. The atom and the aggregate of the atoms separated from the target enter the gap between the deposited flat-plate particles and grow in the plane direction of the substrate to fill the gap. A film is formed over the substrate. After the deposition, heat treatment is performed at high temperature in an oxygen atmosphere, which forms an oxide with a few oxygen vacancies and high crystallinity.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
After a sputtering gas is supplied to a deposition chamber, plasma including an ion of the sputtering gas is generated in the vicinity of a target. The ion of the sputtering gas is accelerated and collides with the target, so that flat-plate particles and atoms of the target are separated from the target. The flat-plate particles are deposited with a gap therebetween so that the flat plane faces a substrate. The atom and the aggregate of the atoms separated from the target enter the gap between the deposited flat-plate particles and grow in the plane direction of the substrate to fill the gap. A film is formed over the substrate. After the deposition, heat treatment is performed at high temperature in an oxygen atmosphere, which forms an oxide with a few oxygen vacancies and high crystallinity.
Semiconductor device
A transistor includes a multilayer film in which an oxide semiconductor film and an oxide film are stacked, a gate electrode, and a gate insulating film. The multilayer film overlaps with the gate electrode with the gate insulating film interposed therebetween. The multilayer film has a shape having a first angle between a bottom surface of the oxide semiconductor film and a side surface of the oxide semiconductor film and a second angle between a bottom surface of the oxide film and a side surface of the oxide film. The first angle is acute and smaller than the second angle. Further, a semiconductor device including such a transistor is manufactured.
Semiconductor device
A transistor includes a multilayer film in which an oxide semiconductor film and an oxide film are stacked, a gate electrode, and a gate insulating film. The multilayer film overlaps with the gate electrode with the gate insulating film interposed therebetween. The multilayer film has a shape having a first angle between a bottom surface of the oxide semiconductor film and a side surface of the oxide semiconductor film and a second angle between a bottom surface of the oxide film and a side surface of the oxide film. The first angle is acute and smaller than the second angle. Further, a semiconductor device including such a transistor is manufactured.
Semiconductor device comprising oxide semiconductor with c-axis-aligned crystals
An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region.
Semiconductor device comprising oxide semiconductor with c-axis-aligned crystals
An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region.
SPUTTERING TARGET AND METHOD FOR MANUFACTURING THE SAME
A novel metal oxide or a novel sputtering target is provided. A sputtering target includes a conductive material and an insulating material. The insulating material includes an oxide, a nitride, or an oxynitride including an element M1. The element M1 is one or more kinds of elements selected from Al, Ga, Si, Mg, Zr, Be, and B. The conductive material includes an oxide, a nitride, or an oxynitride including indium and zinc. A metal oxide film is deposited using the sputtering target in which the conductive material and the insulating material are separated from each other.
SPUTTERING TARGET AND METHOD FOR MANUFACTURING THE SAME
A novel metal oxide or a novel sputtering target is provided. A sputtering target includes a conductive material and an insulating material. The insulating material includes an oxide, a nitride, or an oxynitride including an element M1. The element M1 is one or more kinds of elements selected from Al, Ga, Si, Mg, Zr, Be, and B. The conductive material includes an oxide, a nitride, or an oxynitride including indium and zinc. A metal oxide film is deposited using the sputtering target in which the conductive material and the insulating material are separated from each other.
Three dimensional (3D) double gate semiconductor
Disclosed are semiconductor devices including a double gate metal oxide semiconductor (MOS) transistor and methods for fabricating the same. The double gate MOS transistor includes a first back gate, a second back gate, and a first dielectric layer disposed on the first back gate and on the second back gate. An MX2 material layer is disposed on the first dielectric layer, a second dielectric layer disposed on the MX2 material layer, and a work function metal (WFM) is disposed on the second dielectric layer. A front gate is disposed on the WFM, which fills a space between the first back gate and the second back.