A semiconductor device includes a metal layer, an insulating layer disposed above the metal layer, and a multi-layer diffusion barrier disposed on the metal layer between the metal layer and the insulating layer. The multi-layer diffusion barrier includes a first material layer including a metallic nitride and a second material layer including a metallic oxide.

The disclosure discloses a method for manufacturing light-emitting diode (LED) chips. The manufacturing method includes: providing a plurality of LED elements; randomly mixing the plurality of LED elements; performing a mesa process on the plurality of LED elements; and forming at least one pair of electrodes on the plurality of LED elements. An electronic device includes the LED chips.

An oxide semiconductor film contains In, Ga, and Sn at respective atomic ratios satisfying formulae (1) to (3): 0.01≤Ga/(In+Ga+Sn)≤0.30 . . . (1); 0.01≤Sn/(In+Ga+Sn)≤0.40 . . . (2); and 0.55≤In/(In+Ga+Sn)≤0.98 . . . (3), and Al at an atomic ratio satisfying a formula (4): 0.05≤Al/(In+Ga+Sn+Al)≤0.30 . . . (4).

An oxide semiconductor film contains In, Ga, and Sn at respective atomic ratios satisfying formulae (1) to (3): 0.01≤Ga/(In+Ga+Sn)≤0.30 . . . (1); 0.01≤Sn/(In+Ga+Sn)≤0.40 . . . (2); and 0.55≤In/(In+Ga+Sn)≤0.98 . . . (3), and Al at an atomic ratio satisfying a formula (4): 0.05≤Al/(In+Ga+Sn+Al)≤0.30 . . . (4).

A semiconductor device includes a first semiconductor layer, a second semiconductor layer provided on a portion of the first semiconductor layer, a third semiconductor layer provided on a portion of the second semiconductor layer and separated from the first semiconductor layer, a fourth semiconductor layer provided on an other portion of the first semiconductor layer, a first insulating film provided on a portion between the third semiconductor layer and the fourth semiconductor layer and on a portion of the fourth semiconductor layer at the second semiconductor layer side, a second insulating film contacting the first insulating film, a third insulating film provided above the second insulating film, and an electrode provided on the first insulating film, on the second insulating film, and on the third insulating film. The second insulating film is provided on the fourth semiconductor layer, and is thicker than the first insulating film.

A semiconductor device includes a first semiconductor layer, a second semiconductor layer provided on a portion of the first semiconductor layer, a third semiconductor layer provided on a portion of the second semiconductor layer and separated from the first semiconductor layer, a fourth semiconductor layer provided on an other portion of the first semiconductor layer, a first insulating film provided on a portion between the third semiconductor layer and the fourth semiconductor layer and on a portion of the fourth semiconductor layer at the second semiconductor layer side, a second insulating film contacting the first insulating film, a third insulating film provided above the second insulating film, and an electrode provided on the first insulating film, on the second insulating film, and on the third insulating film. The second insulating film is provided on the fourth semiconductor layer, and is thicker than the first insulating film.

A schottky barrier diode element having a silicon (Si) substrate, an oxide semiconductor layer and a schottky electrode layer, wherein the oxide semiconductor layer includes a polycrystalline and/or amorphous oxide semiconductor having a band gap of 3.0 eV or more and 5.6 eV or less.

A schottky barrier diode element having a silicon (Si) substrate, an oxide semiconductor layer and a schottky electrode layer, wherein the oxide semiconductor layer includes a polycrystalline and/or amorphous oxide semiconductor having a band gap of 3.0 eV or more and 5.6 eV or less.

A laminated body comprising a substrate, one or more layers selected from a contact resistance reducing layer and a reduction suppressing layer, a Schottky electrode layer and a metal oxide semiconductor layer in this order.

A laminated body comprising a substrate, one or more layers selected from a contact resistance reducing layer and a reduction suppressing layer, a Schottky electrode layer and a metal oxide semiconductor layer in this order.