Patent classifications
H01L29/26
POWER MOSFETS AND METHODS FOR MANUFACTURING THE SAME
A semiconductor device and the method of manufacturing the same are provided. The semiconductor device comprises a well region, a first doped region, a drain region, a source region and a gate electrode. The first doped region of a first conductivity type is located at a first side within the well region. The drain region of the first conductivity type is within the first doped region. The source region of the first conductivity type is at a second side within the well region, wherein the second side being opposite to the first side. The gate electrode is over the well region and between the source region and the drain region. A surface of the drain region and a surface of the source region define a channel and the surface of the source region directly contacts the well region.
POWER MOSFETS AND METHODS FOR MANUFACTURING THE SAME
A semiconductor device and the method of manufacturing the same are provided. The semiconductor device comprises a well region, a first doped region, a drain region, a source region and a gate electrode. The first doped region of a first conductivity type is located at a first side within the well region. The drain region of the first conductivity type is within the first doped region. The source region of the first conductivity type is at a second side within the well region, wherein the second side being opposite to the first side. The gate electrode is over the well region and between the source region and the drain region. A surface of the drain region and a surface of the source region define a channel and the surface of the source region directly contacts the well region.
Germanium-silicon-tin (GeSiSn) heterojunction bipolar transistor devices
The methods of manufacture of GeSiSn heterojunction bipolar transistors, which include light emitting transistors and transistor lasers and photo-transistors and their related structures are described herein. Other embodiments are also disclosed herein.
Oxide semiconductor
To provide an oxide semiconductor with a novel structure. Such an oxide semiconductor is composed of an aggregation of a plurality of InGaZnO.sub.4 crystals each of which is larger than or equal to 1 nm and smaller than or equal to 3 nm, and in the oxide semiconductor, the plurality of InGaZnO.sub.4 crystals have no orientation. Alternatively, such an oxide semiconductor is such that a diffraction pattern like a halo pattern is observed by electron diffraction measurement performed by using an electron beam with a probe diameter larger than or equal to 300 nm, and that a diffraction pattern having a plurality of spots arranged circularly is observed by electron diffraction measurement performed by using an electron beam with a probe diameter larger than or equal to 1 nm and smaller than or equal to 30 nm.
Oxide semiconductor
To provide an oxide semiconductor with a novel structure. Such an oxide semiconductor is composed of an aggregation of a plurality of InGaZnO.sub.4 crystals each of which is larger than or equal to 1 nm and smaller than or equal to 3 nm, and in the oxide semiconductor, the plurality of InGaZnO.sub.4 crystals have no orientation. Alternatively, such an oxide semiconductor is such that a diffraction pattern like a halo pattern is observed by electron diffraction measurement performed by using an electron beam with a probe diameter larger than or equal to 300 nm, and that a diffraction pattern having a plurality of spots arranged circularly is observed by electron diffraction measurement performed by using an electron beam with a probe diameter larger than or equal to 1 nm and smaller than or equal to 30 nm.
Storage element, storage device, and signal processing circuit
A signal processing circuit whose power consumption can be suppressed is provided. In a period during which a power supply voltage is not supplied to a storage element, data stored in a first storage circuit corresponding to a nonvolatile memory can be held by a first capacitor provided in a second storage circuit. With the use of a transistor in which a channel is formed in an oxide semiconductor layer, a signal held in the first capacitor is held for a long time. The storage element can accordingly hold the stored content (data) also in a period during which the supply of the power supply voltage is stopped. A signal held by the first capacitor can be converted into the one corresponding to the state (the on state or off state) of the second transistor and read from the second storage circuit. Consequently, an original signal can be accurately read.
Storage element, storage device, and signal processing circuit
A signal processing circuit whose power consumption can be suppressed is provided. In a period during which a power supply voltage is not supplied to a storage element, data stored in a first storage circuit corresponding to a nonvolatile memory can be held by a first capacitor provided in a second storage circuit. With the use of a transistor in which a channel is formed in an oxide semiconductor layer, a signal held in the first capacitor is held for a long time. The storage element can accordingly hold the stored content (data) also in a period during which the supply of the power supply voltage is stopped. A signal held by the first capacitor can be converted into the one corresponding to the state (the on state or off state) of the second transistor and read from the second storage circuit. Consequently, an original signal can be accurately read.
Oxide semiconductor film, electronic device comprising thin film transistor, oxide sintered body and sputtering target
An oxide semiconductor film contains In, Ga, and Sn at respective atomic ratios of 0.01≤Ga/(In+Ga+Sn)≤0.30 . . . (1), 0.01≤Sn/(In+Ga+Sn)≤0.40 . . . (2), and 0.55≤In/(In+Ga+Sn)≤0.98 . . . (3), and a rare-earth element X at an atomic ratio of 0.03≤X/(In+Ga+Sn+X)≤0.25 . . . (4).
Integrated Structures Having Gallium-Containing Regions
Some embodiments include an integrated structure having a gallium-containing material between a charge-storage region and a semiconductor-containing channel region. Some embodiments include an integrated structure having a charge-storage region under a conductive gate, a tunneling region under the charge-storage region, and a semiconductor-containing channel region under the tunneling region. The tunneling region includes at least one dielectric material directly adjacent a gallium-containing material. Some embodiments include an integrated structure having a charge-trapping region under a conductive gate, a first oxide under the charge-storage region, a gallium-containing material under the first oxide, a second oxide under the gallium-containing material, and a semiconductor-containing channel region under the second oxide.
Method for manufacturing semiconductor device
One object of one embodiment of the present invention is to provide a highly reliable semiconductor device including an oxide semiconductor, which has stable electrical characteristics. In a method for manufacturing a semiconductor device, a first insulating film is formed; source and drain electrodes and an oxide semiconductor film electrically connected to the source and drain electrodes are formed over the first insulating film; heat treatment is performed on the oxide semiconductor film so that a hydrogen atom in the oxide semiconductor film is removed; oxygen doping treatment is performed on the oxide semiconductor film, so that an oxygen atom is supplied into the oxide semiconductor film; a second insulating film is formed over the oxide semiconductor film; and a gate electrode is formed over the second insulating film so as to overlap with the oxide semiconductor film.