A stack including at least a semiconductor drift layer stacked on a single-crystal diamond substrate having a coalescence boundary, wherein the coalescence boundary of the single-crystal diamond substrate is a region that exhibits, in a Raman spectrum at a laser excitation wavelength of 785 nm, a full width at half maximum of a peak near 1332 cm.sup.−1 due to diamond that is observed to be broader than a full width at half maximum of the peak exhibited by a region different from the coalescence boundary, the coalescence boundary has a width of 200 μm or more, and the semiconductor drift layer is stacked on at least the coalescence boundary.

Synaptic resistors (synstors), and their method of manufacture and integration into exemplary circuits are provided. Synstors are configured to emulate the analog signal processing, learning, and memory functions of synapses. Circuits incorporating synstors are capable of performing signal processing and learning concurrently in parallel analog mode with speed, energy efficiency, and functions superior to computers.

Synaptic resistors (synstors), and their method of manufacture and integration into exemplary circuits are provided. Synstors are configured to emulate the analog signal processing, learning, and memory functions of synapses. Circuits incorporating synstors are capable of performing signal processing and learning concurrently in parallel analog mode with speed, energy efficiency, and functions superior to computers.

One example provides an integrated circuit comprising a transistor including a semiconductor channel. The semiconductor channel includes three or more sub-channels, one or more nodes, each node being a junction of at least three sub-channels, and channel ends. A Schottky contact at each channel end forms a source or drain contact, and a gate contact disposed at each Schottky contact controls a barrier conductivity of the corresponding Schottky contact.

One example provides an integrated circuit comprising a transistor including a semiconductor channel. The semiconductor channel includes three or more sub-channels, one or more nodes, each node being a junction of at least three sub-channels, and channel ends. A Schottky contact at each channel end forms a source or drain contact, and a gate contact disposed at each Schottky contact controls a barrier conductivity of the corresponding Schottky contact.

A Schottky barrier diode according to the present disclosure includes an n-type semiconductor substrate, one or more p-type guard rings provided on a side of an upper surface of the semiconductor substrate, an anode electrode provided on the upper surface of the semiconductor substrate, a cathode electrode provided on a rear surface of the semiconductor substrate and an insulating film provided on an inner guard ring on an innermost side among the one or more guard rings, wherein the anode electrode rides on the insulating film and has its end portion provided just above the inner guard ring, the anode electrode and the inner guard ring are provided away from each other, and a thickness of the insulating film is 1.0 μm or more.

A Schottky barrier diode according to the present disclosure includes an n-type semiconductor substrate, one or more p-type guard rings provided on a side of an upper surface of the semiconductor substrate, an anode electrode provided on the upper surface of the semiconductor substrate, a cathode electrode provided on a rear surface of the semiconductor substrate and an insulating film provided on an inner guard ring on an innermost side among the one or more guard rings, wherein the anode electrode rides on the insulating film and has its end portion provided just above the inner guard ring, the anode electrode and the inner guard ring are provided away from each other, and a thickness of the insulating film is 1.0 μm or more.

Provided is a semiconductor element including: a multilayer structure including: a conductive substrate; and an oxide semiconductor film arranged directly on the conductive substrate or over the conductive substrate via a different layer, the oxide semiconductor film including an oxide, as a major component, containing gallium, the conductive substrate having a larger area than the oxide semiconductor film.

Provided is a semiconductor element including: a multilayer structure including: a conductive substrate; and an oxide semiconductor film arranged directly on the conductive substrate or over the conductive substrate via a different layer, the oxide semiconductor film including an oxide, as a major component, containing gallium, the conductive substrate having a larger area than the oxide semiconductor film.

A nitride-based semiconductor device includes a first and second nitride-based semiconductor layers, a doped III-V semiconductor layer, a gate electrode, a first and second source/drain (S/D) electrodes. The doped III-V semiconductor layer is disposed over the second nitride-based semiconductor layer and has first and second current-leakage barrier portions which extends downward from atop surface of the doped III-V semiconductor layer. The gate electrode is disposed above the doped III-V semiconductor layer, in which the gate electrode has a pair of opposite edges between the first and second current-leakage barrier portions. One of the edges of the gate electrode coincides with the first current-leakage barrier portion. The first current-leakage barrier portion is located between the first S/D electrode and the gate electrode. The second current-leakage barrier portion is located between the second S/D electrode and the gate electrode.