A semiconductor device according to an embodiment includes a silicon carbide layer; a gate electrode; and a gate insulating layer which is provided between the silicon carbide layer and the gate electrode and includes a first silicon oxide layer and a second silicon oxide layer provided between the first silicon oxide layer and the gate electrode, the first silicon oxide layer having a first nitrogen concentration and a first thickness, the second silicon oxide layer having a second nitrogen concentration lower than the first nitrogen concentration and a second thickness. The second thickness between an end portion of the gate electrode and the silicon carbide layer is greater than the second thickness between a central portion of the gate electrode and the silicon carbide layer.

A semiconductor device according to an embodiment includes a silicon carbide layer having a first and second plane, first and second trench extending in first direction, and in the silicon carbide layer, n-type first region, p-type second region between the n-type first region and the first plane and between the first and second trench, p-type fifth region covering bottom of the first trench, p-type sixth region covering bottom of the second trench, n-type seventh region between the fifth region and the second region, n-type eighth region between the sixth and second regions, p-type ninth regions contacting the fifth and second regions, and p-type tenth regions contacting the sixth region and the second region, the ninth and tenth regions repeatedly disposed in the first direction, and a line segment connecting the ninth region and the tenth region is oblique with respect to second direction perpendicular to the first direction.

A SiC epitaxial wafer includes a SiC substrate and a SiC epitaxial layer disposed on the SiC substrate. The SiC epitaxial layer includes a high carrier concentration layer and two low carrier concentration layers having lower carrier concentration than the high carrier concentration layer, and being in contact with a top surface and a bottom surface of the high carrier concentration layer to sandwich the high carrier concentration layer. A difference in carrier concentration between the high carrier concentration layer and the low carrier concentration layers is 510.sup.14/cm.sup.3 or more and 210.sup.16/cm.sup.3 or less.

A method for forming semiconductor devices includes: grinding a backside of a semiconductor wafer with a grinding wheel during a first time interval, wherein the grinding wheel is forward moved during the first time interval, wherein a plurality of semiconductor devices are formed on the semiconductor wafer; polishing the backside of the semiconductor wafer with the grinding wheel in a second time interval, wherein the grinding wheel is backward moved during the second time interval; and dicing the semiconductor wafer to separate the plurality of semiconductor devices from each other without additional polishing of the backside of the semiconductor wafer before dicing the semiconductor wafer.

In a vertical power MOSFET having a superjunction structure, the withstand voltage of the power MOSFET can be ensured even if the aspect ratios of an n-type column region and a p-type column region are increased so as to vary the impurity concentration of the p-type column region. P-type semiconductor regions PR1 are formed on the sides of an n-type column NC1 adjacent to a p-type column region PC1. In this configuration, the p-type semiconductor region PR1 is formed from the upper end of the n-type column region NC1 to about a half depth of a height from the upper end to the lower end of the side of the n-type column region NC1. This inclines the sides of the overall p-type column region including the p-type semiconductor regions PR1 and the p-type column region PC1.

The present invention relates to a method for separating at least one solid-body layer (4) from at least one solid body (1). Thereby, the method as claimed in the invention comprises the steps: creating a plurality of modifications (9) by means of laser beams within the interior space of the solid body (1) to form a detachment plane (8), producing a composite structure by arranging or producing layers and/or components (150) on or above an initially exposed surface (5) of the solid body (1), wherein the exposed surface (5) is an integral part of the solid-body layer (4) to be separated, introducing an external force into the solid body (1) for generating tensions within the solid body (1), wherein the external force is so strong that the tensions initialize a crack propagation along the detachment plane (8), wherein the modifications for forming the detachment plane (8) are created before producing the composite structure.

The object of the present invention is to enhance the device yield of SiC epitaxial wafers. The SiC epitaxial wafer includes a drift layer which is a SiC epitaxial layer. The drift layer has a film thickness of 18 m or more and 350 m or less and has arithmetic average roughness of 0.60 nm or more and 3.00 nm or less, and the impurity concentration thereof is 110.sup.14/cm.sup.3 or more and 510.sup.15/cm.sup.3 or less.

A semiconductor device according to an embodiment includes a silicon carbide layer having a first and second plane, first and second trench extending in first direction, and in the silicon carbide layer, n-type first region, p-type second region between the n-type first region and the first plane and between the first and second trench, p-type fifth region covering bottom of the first trench, p-type sixth region covering bottom of the second trench, n-type seventh region between the fifth region and the second region, n-type eighth region between the sixth and second regions, p-type ninth regions contacting the fifth and second regions, and p-type tenth regions contacting the sixth region and the second region, the ninth and tenth regions repeatedly disposed in the first direction, and a line segment connecting the ninth region and the tenth region is oblique with respect to second direction perpendicular to the first direction.

A semiconductor device may include an n type of layer disposed at a first surface of a substrate; a p type of region and a p+ type of region disposed at a top portion of the n type of layer; a first electrode disposed on the p type of region and the p+ type of region; and a second electrode disposed at a second surface of the substrate, wherein the first electrode includes a first metal layer disposed on the p type of region and a second metal layer disposed on the first metal layer, and the first metal layer is in continuous contact with the p type of region.

A method for manufacturing a high-voltage semiconductor device includes exposing a semiconductor substrate to a plasma to form a protective substance layer on the semiconductor substrate. A semiconductor device includes a semiconductor substrate and a protective substance layer on the semiconductor substrate.