An oxide semiconductor sputtering target used in a sputtering process to deposit an active layer of a TFT. The oxide semiconductor sputtering target is formed from a material based on a composition of In, Sn, Ga, Zn, and O. The material contains gallium oxide, tin oxide, zinc oxide, and indium oxide. The In, Sn, Ga, and Zn contents are in ranges of 60% to 80%, 0.5% to 8%, 5% to 15%, and 10% to 30% by weight with respect to the weight of In+Sn+Ga+Zn, respectively. A method of fabricating a TFT includes depositing an active layer using the oxide semiconductor sputtering target. Such a TFT is used in a liquid crystal display (LCD), an organic light-emitting display, an electroluminescence display, and the like.

In a transistor including an oxide semiconductor, a change in electrical characteristics is suppressed and reliability is improved. The transistor includes an oxide semiconductor film over a first insulating film; a second insulating film over the oxide semiconductor film; a metal oxide film over the second insulating film; a gate electrode over the metal oxide film; and a third insulating film over the oxide semiconductor film and the gate electrode. The oxide semiconductor film includes a channel region overlapping with the gate electrode, a source region in contact with the third insulating film, and a drain region in contact with the third insulating film. The source region and the drain region contain one or more of hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, and a rare gas.

A novel composite oxide semiconductor which can be used in a transistor including an oxide semiconductor film is provided. In the composite oxide semiconductor, a first region and a second region are mixed. The first region includes a plurality of first clusters containing In and oxygen as main components. The second region includes a plurality of second clusters containing Zn and oxygen as main components. The plurality of first clusters have portions connected to each other. The plurality of second clusters have portions connected to each other.

Provided are electronic devices and methods of manufacturing the same. An electronic device may include a substrate, a gate electrode on the substrate, a ferroelectric layer between the substrate and the gate electrode, and a carbon layer between the substrate and the ferroelectric layer. The carbon layer may have an sp.sup.2 bonding structure.

Disclosed herein are integrated circuit (IC) structures, packages, and devices that include thin-film transistors (TFTs) integrated on the same substrate/die/chip as III-N transistors. One example IC structure includes an III-N transistor in a first layer over a support structure (e.g., a substrate) and a TFT in a second layer over the support structure, where the first layer is between the support structure and the second layer. Another example IC structure includes a III-N semiconductor material and a TFT, where at least a portion of a channel material of the TFT is over at least a portion of the III-N semiconductor material.

Disclosed are a multilayer-channel thin-film transistor and a method of fabricating the same. More particularly, a multilayer-channel thin-film transistor, including: a first channel layer formed on a substrate; a first source electrode and first drain electrode formed on the first channel layer; a first gate insulating film formed on the first channel layer, the first source electrode and the first drain electrode; a gate electrode formed on the first gate insulating film; a second gate insulating film formed on the gate electrode; a second channel layer formed on the second gate insulating film; and a second source electrode and second drain electrode formed on the second channel layer, wherein the first source electrode and the second source electrode are electrically connected to each other through a source electrode connection part, and the first drain electrode and the second drain electrode are electrically connected to each other through a drain electrode connection part is disclosed.

Some embodiments of a method for manufacturing integrated circuits include the operations of forming a back gate structure on a substrate, forming a memory layer over the back gate structure, forming a buffer layer over the memory layer, forming a conductive channel over the buffer layer, and forming source/drain regions over the conductive channel. In some embodiments, a second buffer layer is formed between the back gate structure and the memory layer.

An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using a metal film, and a channel layer is formed using an oxide semiconductor. The pixel portion includes a pixel transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using an oxide conductor, and a semiconductor layer is formed using an oxide semiconductor. The pixel transistor is formed using a light-transmitting material, and thus, a display device with higher aperture ratio can be manufactured.

A novel material and a transistor using a novel material are provided. A composite oxide includes at least two regions, one of which includes In, Zn and an element M1 (the element M1 is one or more of Al, Ga, Si, B, Y, Ti, Fe, Ni, Ge, Zr, Mo, La, Ce, Nd, Hf, Ta, W, Mg, V, Be, and Cu), and the other of which includes In, Zn, and an element M2 (the element M2 is one or more of Al, Ga, Si, B, Y, Ti, Fe, Ni, Ge, Zr, Mo, La, Ce, Nd, Hf, Ta, W, Mg, V, Be, and Cu). The proportion of the element M1 to In, Zn, and the element M1 in the region including the element M1 is less than that of the element M2 to In, Zn, and the element M2 in the region including the element M2. In an analysis of the composite oxide by X-ray diffraction, the diffraction pattern result in the X-ray diffraction is asymmetric with the angle at which the peak intensity of X-ray diffraction is detected as the symmetry axis.

Aspects of the present inventive concept provide a semiconductor device capable of enhancing performance and reliability through source/drain engineering in a transistor including an oxide semiconductor layer. The semiconductor device includes a substrate, a metal oxide layer disposed on the substrate, a source/drain pattern being in contact with the metal oxide layer and including a portion protruding from a top surface of the metal oxide layer, a plurality of gate structures disposed on the metal oxide layer with the source/drain pattern interposed therebetween and each including gate spacers and an insulating material layer, the insulating material layer being in contact with the metal oxide layer, and not extending along a top surface of the source/drain pattern, and a contact disposed on the source/drain pattern, the contact being connected to the source/drain pattern.