A method of forming a sandwich passivation layer (405) on a semiconductor device (400) comprising a bond pad (404) is provided. The method comprises forming a first layer (406) over a surface of the semiconductor device (400), removing a part of the first layer (406) to expose a surface of the bond pad (404), forming a second layer (407) over the first layer (406) and the surface of the bond pad (404), and forming a third layer (408) over the second layer (407), wherein the surface of the bond pad (404) is not in contact with the first layer (406) or third layer (408).

A semiconductor light-emitting device includes a GaAs (gallium arsenide) substrate of a cubic crystal, a light-emitting layer and a multi-semiconductor layer. The light-emitting layer being provided on the GaAs substrate. The light-emitting layer includes InGaAs (indium gallium arsenide) represented by a compositional formula InxGa1-xAs (0<x<1). The multi-semiconductor layer being provided on a front surface of the GaAs substrate between the GaAs substrate and the light-emitting layer. The multi-semiconductor layer is tilted with respect to a (100) plane of the cubic crystal. The multi-semiconductor layer includes a first layer and a second layer. The first and second layers are alternately stacked in a direction perpendicular to the front surface of the GaAs substrate. The first layer is different in composition from the second layer.

An isolation system and isolation device are disclosed. An illustrative isolation device is disclosed to include a transmitter circuit to generate a first current in accordance with a first signal, a first elongated conducting element to generate a magnetic field when the first current flows through the first elongated conducting element, a second elongated conducting element adjacent to the first elongated conducting element so as to receive the magnetic field. The second elongated conducting element is configured to generate an induced current when the magnetic field is received. The receiver circuit is configured to receive the induced current as an input, and configured to generate a reproduced first signal as an output of the receiver circuit.

A light detecting element is realized in which a length thereof is reduced in a direction perpendicular to a direction in which light detecting regions are disposed side by side. A light detecting element includes a light detecting surface provided with a plurality of light detecting regions disposed side by side in a first direction and a plurality of wiring regions electrically connected to the plurality of light detecting regions. Of the plurality of wiring regions, a plurality of the wiring regions connected to a plurality of the light detecting regions are provided in an end region that is a region excluding a central region at the light detecting surface.

A detection device includes a substrate, a light-emitter, and a light receiver. The substrate includes a first surface area and a second surface area, in which the first surface area has a first reflectance greater than a second reflectance of the second surface area. The light emitter is disposed on the first surface area, and the light receiver is disposed on the second surface area. The light receiver has a third reflectance which is substantially the same as the second reflectance of the second surface area.

A photoelectric conversion apparatus comprising an avalanche diode disposed in a semiconductor layer having a first surface and a second surface, wherein the avalanche diode includes a first semiconductor region disposed at a first depth, a second semiconductor region disposed at a second depth deeper from the second surface than the first depth, a third semiconductor region disposed at an edge of the first semiconductor region, a first wiring connected to the first semiconductor region, a second wiring connected to the second semiconductor region, and a third wiring not connected to the semiconductor layer, at least a part of the third wiring overlapping with the third semiconductor region in a planar view, and wherein a third voltage to be supplied to the third wiring is a value between a first voltage to be supplied to the first wiring and a second voltage to be supplied to the second wiring.

Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.

A chip-scale sensor package structure includes a sensor chip, a first package body surrounding and connected to an outer lateral side of the sensor chip, a ring-shaped support disposed on a top side of the first package body, a light permeable member disposed on the ring-shaped support, and a redistribution layer (RDL) disposed on a bottom surface of the sensor chip and a bottom side of the first package body. The sensor chip includes a sensing region arranged on the top surface thereof, a plurality of internal contacts, and a plurality of conductive paths respectively connected to the internal contacts and electrically coupled to the sensing region. The sensing region is spaced apart from the ring-shaped support by a distance less than 300 μm. A bottom surface of the RDL has a plurality of external contacts electrically coupled to the internal contacts.

An electronic device and a fabrication method thereof are provided. The electronic device includes a circuit structure layer, a package structure, an electronic element, and a plurality of function elements. The circuit structure layer has a first side and a second side opposite to the first side. The package structure is disposed on the first side of the circuit structure layer. The electronic element is embedded or encapsulated in the package structure. The function elements are disposed on the second side of the circuit structure layer. The function elements are electrically connected to the electronic element through the circuit structure layer. The electronic device provided by the disclosure exhibits borderless design or has a large function region.

A chip package structure includes a substrate having a first surface and a second surface being opposite surfaces of the substrate; a housing disposed on the first surface of the substrate and enclosing a chip region; and a chip set disposed in the chip region and electrically connected to the substrate. The chip set includes a first chip and a second chip, and an active surface of the second chip faces the active surface of the first chip.