In described examples, an integrated circuit includes a leadframe structure, which includes electrical conductors. A first coil structure is electrically connected to a first pair of the electrical conductors of the leadframe structure. The first coil structure is partially formed on a semiconductor die structure. A second coil structure is electrically connected to a second pair of the electrical conductors of the leadframe structure. The second coil structure is partially formed on the semiconductor die structure. A molded package structure encloses portions of the leadframe structure. The molded package structure exposes portions of the first and second pairs of the electrical conductors to allow external connection to the first and second coil structures. The molded package structure includes a cavity to magnetically couple portions of the first and second coil structures.

A photodetector comprises a semiconductor substrate having an input surface for receiving illumination, control electrodes for control of photogenerated charge within the substrate and a filter on the radiation input surface of the substrate, the filter comprising a dielectric-metal band pass filter having a metal layer and one or more dielectric layers with one dielectric layer between the substrate surface and the metal layer. A connector is provided for applying a bias voltage to the metal layer with respect to the substrate. In effect, the metal layer of the band pass filter provides two functions. The first function is as part of the ITF filter selecting the wavelength desired for the device. The second function is as a conductive layer allowing a bias to be provided between the substrate and the metal layer thereby producing a field within the surface of the substrate to which the filter is applied.

This disclosure discloses an optical sensing device. The device includes a carrier body having a topmost surface; a first light-emitting device disposed on the carrier body and having a light-emitting surface; and a light-receiving device comprising a group III-V semiconductor material disposed on the carrier body and having a light-receiving surface. The light-emitting surface is separated from the topmost surface by first distant H1, the light-receiving surface is separated from the topmost surface by a second distance H2, and H1 is different from H2.

An optical sensor module and a sensor chip thereof are provided. The optical sensor module includes a substrate, a sensor chip and a passive chip. The sensor chip is disposed on the substrate, and the sensor chip includes a chip body having an active region located at a top side thereof and a recess portion depressed from a top surface of the chip body. The passive chip is accommodated in the recess portion, and a depth of the recess portion is greater than a thickness of the passive chip.

The present disclosure provides a semiconductor device and a semiconductor component. The semiconductor device includes an active structure, a ring-shaped semiconductor contact layer, a first electrode, and an insulating layer. The active structure has a first-conductivity-type semiconductor layer, a second-conductivity-type semiconductor layer, and an active layer located between the first-conductivity-type semiconductor layer and the second-conductivity-type semiconductor layer. The ring-shaped semiconductor contact layer is located on the second-conductivity-type semiconductor layer and having a first inner sidewall and a first outer sidewall. The first electrode has an upper surface and covers the ring-shaped semiconductor contact layer. The insulating layer covers the first electrode and the active structure and has a second inner sidewall and a second outer sidewall. The first inner sidewall is not flush with the second inner sidewall in a vertical direction.

Disclosed is an active photonic device having a Darlington configuration with a substrate and a collector layer that is over the substrate. The collector layer includes an inner collector region. An outer collector region substantially surrounds the inner collector region and is spaced apart from the inner collector region. A base layer is over the collector layer. A first outer base region and a second outer base region substantially surround the inner base region and are spaced apart from the inner base region and each other. An emitter layer is over the base layer. The emitter layer includes an inner emitter region that is ring-shaped and resides over and extends substantially around an outer periphery of the inner base region. A first outer emitter region and a second outer emitter region substantially surround the inner emitter region and are spaced apart from the inner emitter region and each other.

A semiconductor package device includes an electronic device. The electronic device includes a first carrier, a first electronic component, a second carrier, a second electronic component, an encapsulant, and a lens. The first electronic component is disposed on the first carrier. The second carrier defines an aperture and is disposed on the first carrier. The aperture is positioned over the first electronic component and exposes the first electronic component. The second electronic component is disposed on the second carrier. The encapsulant covers the second electronic component. The lens defines a cavity and is disposed on the aperture of the first carrier.

Wafer level proximity sensors are formed by processing a silicon substrate wafer and a silicon cap wafer separately, bonding the cap wafer to the substrate wafer, forming an interconnect structure of through-silicon vias within the substrate, and singulating the bonded wafers to yield individually packaged sensors. The wafer level proximity sensor is smaller than a conventional proximity sensor and can be manufactured using a shorter fabrication process at a lower cost. The proximity sensors are coupled to external components by a signal path that includes the through-silicon vias and a ball grid array formed on a lower surface of the silicon substrate. The design of the wafer level proximity sensor passes more light from the light emitter and more light to the light sensor.

The invention relates to a method for producing a plurality of optoelectronic semiconductor components (1), comprising the following steps: a) providing a semiconductor layer sequence (2) having a plurality of semiconductor body regions (200); b) providing a plurality of carrier bodies (3), which each have a first contact structure (31) and a second contact structure (32); c) forming a composite (4) having the semiconductor layer sequence and the carrier bodies in such a way that adjacent carrier bodies are separated from one another by interspaces (35) and each semiconductor body area is electrically conductive connected to the first contact structure and the second contact structure of the associated carrier body; and d) separating the composite into the plurality of semiconductor components, wherein the semiconductor components each have a semiconductor body (20) and a carrier body. The invention further relates to an optoelectronic semiconductor component (1).

A scalable fuse design for individual pixels of a focal plane array of photodiodes comprises a fuse disposed on the upper surface of each photodiode in the array, wherein the fuse is situated proximal to a side of each photodiode. The fuse of each photodiode is electrically coupled to the active region thereof via a first bus and is electrically coupled to an ROIC via a second bus.