The present disclosure is a heat blocking device 101 that includes a heat blocking film 10 including: a particle that absorbs an infrared ray and generates an electron and a hole; and an acceptor that receives the electron or the hole from the particle. A charge carrier selected from the electron and the hole is released from the heat blocking film 10 to an outside of the device. The heat blocking device 101 can function as a “heat removing” device. The heat blocking film 10 may be a single-layer film or a multilayer film.

A method for structuring an insulating layer on a semiconductor wafer, at least comprising the steps of: Provision of a semiconductor wafer with a top, a bottom and comprising multiple solar cell stacks, wherein each solar cell stack is a Ge substrate, which forms the bottom of the semiconductor wafer, a Ge subcell and at least two III-V subcells, in the above order, and at least one passage opening, which extends from the top to the bottom of the semiconductor wafer and has a connected side wall, an insulating layer two-dimensionally deposited on the top of the semiconductor wafer, on the side wall of the passage opening and/or on the bottom of the semiconductor wafer, and the deposition of an etch-resistant filling material by means of a printing process on an area of the top which comprises the passage opening, and into the passage opening.

A method for structuring an insulating layer on a semiconductor wafer, at least comprising the steps of: Provision of a semiconductor wafer with a top, a bottom and comprising multiple solar cell stacks, wherein each solar cell stack is a Ge substrate, which forms the bottom of the semiconductor wafer, a Ge subcell and at least two III-V subcells, in the above order, and at least one passage opening, which extends from the top to the bottom of the semiconductor wafer and has a connected side wall, an insulating layer two-dimensionally deposited on the top of the semiconductor wafer, on the side wall of the passage opening and/or on the bottom of the semiconductor wafer, and the deposition of an etch-resistant filling material by means of a printing process on an area of the top which comprises the passage opening, and into the passage opening.

A process for producing silicon nano-particles from a raw silicon material, the process including steps of alloying the raw silicon material with at least one alloying metal to form an alloy; thereafter, processing the alloy to form alloy nano-particles; and thereafter, distilling the alloying metal from the alloy nano-particles whereby silicon nano-particles are produced.

An emissive nanocrystal particle includes a core including a first semiconductor nanocrystal including a Group III-V compound and a shell including a second semiconductor nanocrystal surrounding the core, wherein the emissive nanocrystal particle includes a non-emissive Group I element.

An emissive nanocrystal particle includes a core including a first semiconductor nanocrystal including a Group III-V compound and a shell including a second semiconductor nanocrystal surrounding the core, wherein the emissive nanocrystal particle includes a non-emissive Group I element.

PV layer sequences and corresponding production methods which can reliably provide a PV function with a long service life despite very low production costs. This is achieved by a reactive conditioning process of inorganic particles as part of a room-temperature printing method; the reactive surface conditioning process adjusts the PV activity in a precise manner, provides a kinetically controlled reaction product, and can ensure the desired PV activity even when using technically pure starting materials with 97% purity. In concrete embodiments, particles are printed in composite so as to form sub-sections on a support. Each sub-section has a reductively treated section and an oxidatively treated section, and the sections have PV activity with opposite signs. The sections can be cascaded in rows via upper-face contacts, and a precise light-dependent potential sum can be tapped via a PV measuring group.

The present application discloses a display panel and a display device. The display panel includes a substrate; an active switch, which is arrange on the substrate and includes a first active switch and a second active switch; a pixel, which is arrange on the substrate and coupled to the first active switch and includes a quantum dot light-emitting diode; and a light sensor, which is arrange on the substrate and coupled to the second active switch and includes a quantum dot light sensing layer.

A method for structuring an insulating layer on a semiconductor wafer, at least comprising the steps of: Provision of a semiconductor wafer with a top, a bottom and comprising multiple solar cell stacks, wherein each solar cell stack is a Ge substrate, which forms the bottom of the semiconductor wafer, a Ge subcell and at least two III-V subcells, in the above order, and at least one passage opening, which extends from the top to the bottom of the semiconductor wafer and has a connected side wall, an insulating layer two-dimensionally deposited on the top of the semiconductor wafer, on the side wall of the passage opening and/or on the bottom of the semiconductor wafer, and the deposition of an etch-resistant filling material by means of a printing process on an area of the top which comprises the passage opening, and into the passage opening.

A method for structuring an insulating layer on a semiconductor wafer, at least comprising the steps of: Provision of a semiconductor wafer with a top, a bottom and comprising multiple solar cell stacks, wherein each solar cell stack is a Ge substrate, which forms the bottom of the semiconductor wafer, a Ge subcell and at least two III-V subcells, in the above order, and at least one passage opening, which extends from the top to the bottom of the semiconductor wafer and has a connected side wall, an insulating layer two-dimensionally deposited on the top of the semiconductor wafer, on the side wall of the passage opening and/or on the bottom of the semiconductor wafer, and the deposition of an etch-resistant filling material by means of a printing process on an area of the top which comprises the passage opening, and into the passage opening.