Image sensor pixels having low full-well capacity and high sensitivity for applications such as DIS, qDIS, single/multi bit QIS. Some embodiments provide an image sensor pixel architecture, comprises a transfer gate, a floating diffusion region both formed on a first surface of a semiconductor substrate and a buried-well vertically pinned photodiode having a charge accumulation/storage region disposed substantially or entirely beneath the transfer gate. Image sensor may also comprise an array of pixels, wherein each pixel comprises: a vertical bipolar structure including an emitter, base, collector configured for storing photocarriers in the base; and a reset transistor coupled to the base, configured to be completely reset of all free carriers using the reset transistor. The emitter may be configured as a pinning layer to facilitate full depletion of the base. Such image sensor pixels may have a full well capacity less than that giving good signal-to-noise ratio (SNR).

A method of forming a semiconductor material of a photovoltaic device that includes providing a surface of a hydrogenated amorphous silicon containing material, and annealing the hydrogenated amorphous silicon containing material in a deuterium containing atmosphere. Deuterium from the deuterium-containing atmosphere is introduced to the lattice of the hydrogenated amorphous silicon containing material through the surface of the hydrogenated amorphous silicon containing material. In some embodiments, the deuterium that is introduced to the lattice of the hydrogenated amorphous silicon containing material increases the stability of the hydrogenated amorphous silicon containing material.

A method of forming a semiconductor material of a photovoltaic device that includes providing a surface of a hydrogenated amorphous silicon containing material, and annealing the hydrogenated amorphous silicon containing material in a deuterium containing atmosphere. Deuterium from the deuterium-containing atmosphere is introduced to the lattice of the hydrogenated amorphous silicon containing material through the surface of the hydrogenated amorphous silicon containing material. In some embodiments, the deuterium that is introduced to the lattice of the hydrogenated amorphous silicon containing material increases the stability of the hydrogenated amorphous silicon containing material.

A photoelectric conversion element includes an intrinsic layer that is disposed on a semiconductor of a first conductivity type and contains hydrogenated amorphous silicon; and a first-conductivity-type layer containing hydrogenated amorphous silicon of the first conductivity type, a second-conductivity-type layer containing hydrogenated amorphous silicon of a second conductivity type, and an insulating layer, each of which covers a part of the intrinsic layer. A first electrode is disposed on the first-conductivity-type layer with the second-conductivity-type layer therebetween. At least a part of the first electrode is located above a region where the first-conductivity-type layer contacts the intrinsic layer, and at least a part of the second electrode is located above a region where the second-conductivity-type layer contacts the intrinsic layer.

A photoelectric conversion element includes an intrinsic layer that is disposed on a semiconductor of a first conductivity type and contains hydrogenated amorphous silicon; and a first-conductivity-type layer containing hydrogenated amorphous silicon of the first conductivity type, a second-conductivity-type layer containing hydrogenated amorphous silicon of a second conductivity type, and an insulating layer, each of which covers a part of the intrinsic layer. A first electrode is disposed on the first-conductivity-type layer with the second-conductivity-type layer therebetween. At least a part of the first electrode is located above a region where the first-conductivity-type layer contacts the intrinsic layer, and at least a part of the second electrode is located above a region where the second-conductivity-type layer contacts the intrinsic layer.

A PV panel is manufactured using a monolayer of small silicon sphere diodes (10-300 microns in diameter) connected in parallel. The spheres are embedded in an uncured aluminum-containing layer on an aluminum foil substrate in a roll-to-roll process, and the aluminum-containing layer is heated to anneal the aluminum-containing layer as well as p-dope the bottom surface of the spheres. The diffusion of the p-type dopants also creates a back surface field in the spheres to improve efficiency. A dielectric layer is formed, and a phosphorus-containing layer is deposited over the spheres to dope the top surface n-type, forming a pn junction. The phosphorus layer is then removed. A conductor is deposited to contact the top surface. Conformal, index-graded lenses are then formed over each of the spheres to form a thin and flexible PV panel.

A PV panel is manufactured using a monolayer of small silicon sphere diodes (10-300 microns in diameter) connected in parallel. The spheres are embedded in an uncured aluminum-containing layer on an aluminum foil substrate in a roll-to-roll process, and the aluminum-containing layer is heated to anneal the aluminum-containing layer as well as p-dope the bottom surface of the spheres. The diffusion of the p-type dopants also creates a back surface field in the spheres to improve efficiency. A dielectric layer is formed, and a phosphorus-containing layer is deposited over the spheres to dope the top surface n-type, forming a pn junction. The phosphorus layer is then removed. A conductor is deposited to contact the top surface. Conformal, index-graded lenses are then formed over each of the spheres to form a thin and flexible PV panel.

A solar cell is provided with: an n-type single crystal silicon substrate; an n-type amorphous silicon layer disposed on a first main surface of the n-type single crystal silicon substrate; a light receiving surface electrode disposed on the n-type amorphous silicon layer; a p-type amorphous silicon layer disposed on a second main surface of the n-type single crystal silicon substrate; and a rear surface electrode disposed on the p-type amorphous silicon layer. The n-type single crystal silicon substrate has a resistivity within a range of 3.5-13 Ωcm. An i-type amorphous silicon layer may be provided between the n-type single crystal silicon substrate and the n-type amorphous silicon layer, and another i-type amorphous silicon layer may be provided between the n-type single crystal silicon substrate and the p-type amorphous silicon layer.

A solar cell is provided with: an n-type single crystal silicon substrate; an n-type amorphous silicon layer disposed on a first main surface of the n-type single crystal silicon substrate; a light receiving surface electrode disposed on the n-type amorphous silicon layer; a p-type amorphous silicon layer disposed on a second main surface of the n-type single crystal silicon substrate; and a rear surface electrode disposed on the p-type amorphous silicon layer. The n-type single crystal silicon substrate has a resistivity within a range of 3.5-13 Ωcm. An i-type amorphous silicon layer may be provided between the n-type single crystal silicon substrate and the n-type amorphous silicon layer, and another i-type amorphous silicon layer may be provided between the n-type single crystal silicon substrate and the p-type amorphous silicon layer.

A solid-state imaging device with high productivity and improved dynamic range is provided. In the imaging device including a photoelectric conversion element having an i-type semiconductor layer, functional elements, and a wiring, an area where the functional elements and the wiring overlap with the i-type semiconductor in a plane view is preferably less than or equal to 35%, further preferably less than or equal to 15%, and still further preferably less than or equal to 10% of the area of the i-type semiconductor in a plane view. Plural photoelectric conversion elements are provided in the same semiconductor layer, whereby a process for separating the respective photoelectric conversion elements can be reduced. The respective i-type semiconductor layers in the plural photoelectric conversion elements are separated by a p-type semiconductor layer or an n-type semiconductor layer.