An SOI substrate manufacturing method and an SOI substrate are provided, where the method includes: forming a patterned etch-stop layer in an oxide layer of a first silicon substrate, bonding a surface, having the patterned etch-stop layer (130), of the first silicon substrate with a surface of a second silicon substrate, and peeling off a part of the first silicon substrate to form a patterned SOI substrate.

Embodiments of the present disclosure provide a method of manufacturing an optoelectronic device epitaxial structure. The method includes forming a mask pattern on a base substrate, the mask pattern defining a plurality of growth regions on the base substrate, and the plurality of growth regions being separated from each other; and forming an optoelectronic device epitaxial structure in each of the plurality of growth regions; and removing the mask pattern.

A method of forming an electrical device that includes epitaxially growing a first conductivity type semiconductor material of a type III-V semiconductor on a semiconductor substrate. The first conductivity type semiconductor material continuously extending along an entirety of the semiconductor substrate in a plurality of triangular shaped islands; and conformally forming a layer of type III-V semiconductor material having a second conductivity type on the plurality of triangular shaped islands to provide a textured surface of a photovoltaic device. A light emitting diode is formed on the textured surface of the photovoltaic device.

A nitride semiconductor substrate includes a sapphire substrate and a nitride semiconductor layer formed thereon and containing a group III element including Al and nitrogen as a main component. A surface of the sapphire substrate where the nitride semiconductor layer is formed includes recesses having a maximum opening size of from 2 nm to 60 nm in an amount of from 110.sup.9 pieces to 110.sup.11 pieces per cm.sup.2. The recesses and surfaces immediately above the recesses form spaces. Of a surface of the nitride semiconductor layer on the sapphire substrate side, a height difference H between a surface immediately above of each recess and a surface in contact with a flat surface is 10 nm or less. A portion of the nitride semiconductor layer above each recess has a crystalline structure produced by growth along a polar plane of the group III element.

Briefly, in accordance with one embodiment, a transparent conductive structure and method to form such a structure are described. For example, an apparatus may include an optoelectronic device. In such an embodiment, an optoelectronic device may include one or more zinc oxide crystals forming a single contiguous three-dimensional transparent conductive structure. The single contiguous three-dimensional transparent conductive structure may include one or more regions thereof having one or more three dimensional geometrical features in the one or more regions of the single contiguous three-dimensional transparent conductive structure so that the single contiguous three-dimensional transparent conductive structure possesses additional electrical-type and/or optical-type properties. For example, additional electrical-type and/or optical-type properties may include electrical current management and/or light management properties.

A method for fabricating a neutron detector includes providing an epilayer wafer of Boron-10 enriched hexagonal boron nitride (h-.sup.10BN or h-BN or .sup.10BN or BN) having a thickness (t), dicing or cutting the epilayer wafer into one or more BN strips having a width (W) and a length (L), and depositing a first metal contact on a first surface of at least one of the BN strip and a second metal contact on a second surface of the at least one BN strip. The neutron detector includes an electrically insulating submount, a BN epilayer of Boron-10 enriched hexagonal boron nitride (h-.sup.10BN or h-BN or .sup.10BN or BN) placed on the insulating submount, a first metal contact deposited on a first surface of the BN epilayer, and a second metal contact deposited on a second surface of the BN epilayer.

A photo detector comprises a first photo diode configured to capture visible light, a second photo diode configured to capture one of infrared light or ultraviolet light, and an isolation region between the first photo diode and the second photo diode. The photo detector is capable of capturing infrared light and ultraviolet light in addition to visible light.

An inexpensive IR photodetector assembly that can provide high performance in SWIR applications, such as LIDAR. The photodetector assembly can operate as a photodiode, a phototransistor, or can include both a photodiode and a phototransistor. The hybrid photodetector can be composed of one or more absorber layer materials from a first semiconductor family, e.g., p-type InGaAs, laying on one or more wide-band gap semiconductor transducer layer materials from a second semiconductor family, e.g., aluminum gallium nitride (AlGaN) and gallium nitride (GaN), or AlGaN/n-GaN. As such, the absorber layer material and the wide band gap materials can be from two different semiconductor families, making the IR photodetector a hybrid of semiconductor families. After shining IR light onto the absorber layer material, the photo-generated electron-hole pairs can be collected as photocurrent in the photo-voltaic mode.

The seed substrate comprises a base substrate and a base layer comprising a Group III nitride semiconductor formed on the base substrate, which has a high dislocation density region and a low dislocation density region. The planar pattern of the high dislocation density region is a honeycomb pattern. A hollow exists between the base substrate and the low dislocation density region. The object layer is grown through a flux method using the seed substrate. The high dislocation density region is melted back at an initial stage of crystal growth, and thereafter, the object layer is grown on the top surface of the low dislocation density region. A cavity remains between the high dislocation density region and the object layer. The presence of the cavity and the hollow makes easy to peel the object layer from the seed substrate.

A III-nitride tunnel junction with a modified p-n interface, wherein the modified p-n interface includes a delta-doped layer to reduce tunneling resistance. The delta-doped layer may be doped using donor atoms comprised of Oxygen (O), Germanium (Ge) or Silicon (Si); acceptor atoms comprised of Magnesium (Mg) or Zinc (Zn); or impurities comprised of Iron (Fe) or Carbon (C).