Patent classifications
H01L31/1872
Solar cells with improved lifetime, passivation and/or efficiency
A method of fabricating a solar cell can include forming a dielectric region on a silicon substrate. The method can also include forming an emitter region over the dielectric region and forming a dopant region on a surface of the silicon substrate. In an embodiment, the method can include heating the silicon substrate at a temperature above 900 degrees Celsius to getter impurities to the emitter region and drive dopants from the dopant region to a portion of the silicon substrate.
METHOD OF FABRICATING AN EMITTER REGION OF A SOLAR CELL
Methods of fabricating emitter regions of solar cells are described. Methods of forming layers on substrates of solar cells, and the resulting solar cells, are also described.
SOLAR CELL AND PREPARATION METHOD THEREFOR, METHOD FOR PROCESSING N-TYPE DOPED SILICON FILM, AND SEMICONDUCTOR DEVICE
Embodiments of the present disclosure provide a solar cell and a manufacturing method thereof, a processing method of an n-type doped silicon film, and a semiconductor device. The manufacturing method of the solar cell includes: providing a silicon wafer; forming an n-type doped silicon film on a first main surface of the silicon wafer at a first temperature, and simultaneously forming the n-type doped silicon film on at least a portion of surfaces of the silicon wafer except the first main surface due to wrapping around; performing a heat treatment on the n-type doped silicon film at a second temperature; etching and removing the n-type doped silicon film on the surfaces of the silicon wafer except the first main surface after performing the heat treatment; and preparing the solar cell by using the silicon wafer, the first temperature is lower than the second temperature.
Methods for group V doping of photovoltaic devices
According to the embodiments provided herein, a method for doping an absorber layer can include contacting the absorber layer with an annealing compound. The annealing compound can include cadmium chloride and a group V salt comprising an anion and a cation. The anion, the cation, or both can include a group V element. The method can include annealing the absorber layer, whereby the absorber layer is doped with at least a portion of the group V element of the annealing compound.
LASER-TEXTURED THIN-FILM SEMICONDUCTORS BY MELTING AND ABLATION
A photovoltaic device and a method of making the photovoltaic device are disclosed. The photovoltaic device may include a semiconductor layer epitaxially grown using a compound semiconductor material, such as a group III-V semiconductor material, wherein a surface of the semiconductor layer is textured via one or more laser pulses of a laser. The photovoltaic device may also include a dielectric layer deposited over the textured surface of the semiconductor layer, and a back metal reflector provided on the dielectric layer. The textured surface extends a path of light traveling through the photovoltaic device to increase absorption of the light within the photovoltaic device.
LOW-COST PASSIVATED CONTACT FULL-BACK ELECTRODE SOLAR CELL AND PREPARATION METHOD THEREOF
A preparation method of a low-cost passivated contact full-back electrode solar cell includes: performing alkali polishing on a Si wafer; performing RCA cleaning and HF cleaning; growing a tunnel SiO.sub.x film layer, an in-situ doped amorphous Si film layer, and a texturing mask layer on the back of the Si wafer; performing annealing activation on the amorphous Si film layer to form a polycrystalline Si film layer; etching the texturing mask layer; performing double-sided texturing on the Si wafer; performing HF cleaning to remove the texturing mask layer; depositing an AlO.sub.x film on the front and back of the Si wafer; depositing a SiN.sub.x passivation film on the front and back of the Si wafer; ablating a part of the AlO.sub.x film and a part of the SiN.sub.x passivation film on the back of the Si wafer; and performing screen-printing and sintering on the back of the Si wafer.
P+ or N+ type doping process for semiconductors
A p+ or n+ type doping process for semiconductors, allows to implement a semiconductor with a highly doped surface layer, and it comprises the steps of: providing a substrate made of semiconductor material; depositing on a surface of 5 the substrate made of semiconductor material a thin source layer made of dopant material acting as dopant source; depositing on said source layer an additional protective surface layer made of semiconductor material; inducing liquefaction of the surface layer at least until the source layer; and cooling down the substrate surface so as to obtain the diffusion of the dopant material.
BLISTER-FREE POLYCRYSTALLINE SILICON FOR SOLAR CELLS
Described herein are methods of fabricating solar cells. In an example, a method of fabricating a solar cell includes forming an amorphous dielectric layer on the back surface of a substrate opposite a light-receiving surface of the substrate. The method also includes forming a microcrystalline silicon layer on the amorphous dielectric layer by plasma enhanced chemical vapor deposition (PECVD). The method also includes forming an amorphous silicon layer on the microcrystalline silicon layer by PECVD. The method also includes annealing the microcrystalline silicon layer and the amorphous silicon layer to form a homogeneous polycrystalline silicon layer from the microcrystalline silicon layer and the amorphous silicon layer. The method also includes forming an emitter region from the homogeneous polycrystalline silicon layer.
Fin-based photodetector structure
A photodetector disclosed herein includes an N-doped waveguide structure defined in a semiconductor material, wherein the N-doped waveguide structure comprises a plurality of first fins. Each adjacent pair of the plurality of first fins is separated by a trench formed in the semiconductor material. The photodetector also includes a detector structure positioned on the N-doped waveguide structure, wherein a portion of the detector structure is positioned laterally between the plurality of first fins. The detector structure comprises a single crystal semiconductor material. The photodetector also includes a first diffusion region that extends from the bottom surface of the trench into the semiconductor material, wherein the first diffusion region comprises atoms of the single crystal semiconductor material of the detector structure.
Silicon photonics integration method and structure
Approaches for silicon photonics integration are provided. A method includes: forming at least one encapsulating layer over and around a photodetector; thermally crystallizing the photodetector material after the forming the at least one encapsulating layer; and after the thermally crystallizing the photodetector material, forming a conformal sealing layer on the at least one encapsulating layer and over at least one device. The conformal sealing layer is configured to seal a crack in the at least one encapsulating layer. The photodetector and the at least one device are on a same substrate. The at least one device includes a complementary metal oxide semiconductor device or a passive photonics device.