The present invention relates to a solar cell comprising a heterojunction photoelectric device comprising, a front electrode layer, a back electrode layer comprising a metallic contact layer, a light-absorbing silicon layer arranged between said front electrode and said back electrode layers and a doped silicon-based layer arranged between said light-absorbing silicon layer and said back electrode layer, characterized in that said heterojunction photoelectric device further comprises a wide band gap material layer having an electronic band gap greater than 1.4 eV, said wide band gap material layer being applied on a surface of the light-absorbing silicon layer between said light-absorbing silicon layer and said doped silicon-based layer. The present heterojunction layer or stack of layers is compatible with thermal annealing and firing processes at T above 600 C.

A photovoltaic device includes a substrate structure and at least one Se-containing layer, such as a CdSeTe layer. A process for manufacturing the photovoltaic device includes forming the CdSeTe layer over a substrate by at least one of sputtering, evaporation deposition, CVD, chemical bath deposition process, and vapor transport deposition process. The process can also include controlling a thickness range of the Se-containing layer.

An encapsulated integrated photodetector waveguide structures with alignment tolerance and methods of manufacture are disclosed. The method includes forming a waveguide structure bounded by one or more shallow trench isolation (STI) structure(s). The method further includes forming a photodetector fully landed on the waveguide structure.

A method for fabricating a device with integrated photovoltaic cells includes supporting a semiconductor substrate on a first handle substrate and doping the semiconductor substrate to form doped alternating regions with opposite conductivity. A doped layer is formed over a first side the semiconductor substrate. A conductive material is patterned over the doped layer to form conductive islands such that the conductive islands are aligned with the alternating regions to define a plurality of photovoltaic cells connected in series on a monolithic structure.

An encapsulated integrated photodetector waveguide structures with alignment tolerance and methods of manufacture are disclosed. The method includes forming a waveguide structure bounded by one or more shallow trench isolation (STI) structure(s). The method further includes forming a photodetector fully landed on the waveguide structure.

A photovoltaic device includes a substrate structure and at least one Se-containing layer, such as a CdSeTe layer. A process for manufacturing the photovoltaic device includes forming the CdSeTe layer over a substrate by at least one of sputtering, evaporation deposition, CVD, chemical bath deposition process, and vapor transport deposition process. The process can also include controlling a thickness range of the Se-containing layer.

The solar cell includes a collecting electrode on a first principal surface of a photoelectric conversion section. The collecting electrode comprises a first electroconductive layer and a second electroconductive layer in this order from the photoelectric conversion section side. An insulating layer is provided on the first principal surface of the photoelectric conversion section so as to cover substantially the entire surface of the region where the first electroconductive layer is not provided and a part of the first electroconductive layer. The insulating layer on the first electroconductive layer has an opening, and the second electroconductive layer is a plating layer that is in conduction with the first electroconductive layer through the opening section of the insulating layer. The first electroconductive layer contains a metal particle component and an insulating material. The metal particle component of the first electroconductive layer includes primary particles and secondary particles. It is preferable that in a cross-section of the first electroconductive layer, the area ratio of the secondary particles to the total of the primary particles and the secondary particles and the coefficient of variation of the particle size are respectively within specific ranges.

The present invention relates to a photo-charging energy storage device, and has been made in an effort to provide a photo-charging energy storage device which is capable of self-charging by combining a solar cell and a supercapacitor and used as a power source of an IoTs sensor. The resulting photo-charging energy storage device according to the present invention includes: a solar cell; a conductive connector electrically connected to the solar cell, and combined with the solar cell; and a supercapacitor combined with the conductive connector, and charged with the solar cell via an electrical connection with the solar cell through the conductive connector.

Devices and methods for reducing optical losses in transparent conductive oxides (TCOs) used in silicon heterojunction (SHJ) solar cells while enhancing series resistance are disclosed herein. In particular, the methods include reducing the thickness of TCO layers by about 200% to 300% and depositing hydrogenated dielectric layers on top to form double layers of antireflection coating. It has been discovered that the conductivity of a thin TCO layer can be increased through a hydrogen treatment supplied from the capping dielectric during the post deposition annealing. The optimized cells with ITO/SiO.sub.x:H stacks achieved more than 41 mA/cm.sup.2 generation current on 120-micron-thick wafers while having approximately 100 Ohm/square sheet resistance. Further, solar cells and methods may include integration of ITO/SiO.sub.x:H stacks with Cu plating and use ITO/SiN.sub.x/SiO.sub.x triple layer antireflection coatings. The experimental data details the improved optics and resistance in cell stacks with varying materials and thicknesses.

A photovoltaic device includes a substrate structure and at least one Se-containing layer, such as a CdSeTe layer. A process for manufacturing the photovoltaic device includes forming the CdSeTe layer over a substrate by at least one of sputtering, evaporation deposition, CVD, chemical bath deposition process, and vapor transport deposition process. The process can also include controlling a thickness range of the Se-containing layer.