Patent classifications
H01L33/0075
Manufacturable RGB laser diode source and system
A multi-wavelength light emitting device is manufactured by forming first and second epitaxial materials overlying first and second surface regions. The first and second epitaxial materials are patterned to form a plurality of first and second epitaxial dice. At least one of the first plurality of epitaxial dice and at least one of the second plurality of epitaxial dice are transferred from first and second substrates, respectively, to a carrier wafer by selectively etching a release region, separating from the substrate each of the epitaxial dice that are being transferred, and selectively bonding to the carrier wafer each of the epitaxial dice that are being transferred. The transferred first and second epitaxial dice are processed on the carrier wafer to form a plurality of light emitting devices capable of emitting at least a first wavelength and a second wavelength.
LED PRECURSOR
A method of manufacturing a LED precursor and a LED precursor is provided. The LED precursor is manufactured by forming a monolithic growth stack having a growth surface and forming a monolithic LED stack on the growth surface. The monolithic growth stack comprises a first semiconducting layer comprising a Group III-nitride, a second semiconducting layer, and third semi-conducting layer. The second semiconducting layer comprises a first Group III-nitride including a donor dopant such that the second semiconducting layer has a donor density of at least 5×1018 cm-3. The second semiconducting layer has an areal porosity of at least 15% and a first in-plane lattice constant. The third semiconducting layer comprises a second Group III-nitride different to the first Group-III-nitride. The monolithic growth stack comprises a mesa structure comprising the third semiconducting layer such that the growth surface comprises a mesa surface of third semiconducting layer and a sidewall surface of the third semiconducting layer encircling the mesa surface. The sidewall surface of the third semiconducting layer is inclined relative to the mesa surface. The mesa surface of the third semiconducting layer has a second in-plane lattice constant which is greater than the first in-plane lattice constant.
SEMICONDUCTOR LIGHT-EMITTING ELEMENT AND METHOD OF MANUFACTURING SEMICONDUCTOR LIGHT-EMITTING ELEMENT
The semiconductor light-emitting element includes an n-type semiconductor layer; an active layer on the n-type semiconductor layer; a p-type semiconductor layer on the active layer; a p-side contact electrode in contact with the p-type semiconductor layer; a p-side current diffusion layer on the p-side contact electrode; an n-side contact electrode in contact with the n-type semiconductor layer; and an n-side current diffusion layer that includes a first current diffusion layer on the n-side contact electrode, and a second current diffusion layer on the first current diffusion layer, and including a TiN layer. A height difference between upper surfaces of the p-side contact electrode and the first current diffusion layer is 100 nm or smaller; and a height difference between upper surfaces of the p-side current diffusion layer and the second current diffusion layer is 100 nm or smaller.
LOW-DEFECT OPTOELECTRONIC DEVICES GROWN BY MBE AND OTHER TECHNIQUES
In a general aspect, a method for growing an InGaN optoelectronic in a reaction chamber, by MOCVD, includes controlling a surface temperature of a wafer to be at least 750° C. during growth of a light-emitting layer. The light emitting layer includes an InGaN quantum well layer having an In % of greater than 25%. The method further includes providing an indium-containing metalorganic precursor and a gallium-containing metalorganic precursor into the reaction chamber and to the wafer during growth of the light-emitting layer when the surface temperature of the wafer is greater than 750° C. The method also includes providing an N-containing species to the wafer at a rate such that a partial pressure of the N-containing species at the surface of the wafer is greater than 1.5 atmospheres during growth of the light-emitting layer of the optoelectronic device when the surface temperature of the wafer is greater than 750° C.
METHOD OF REMOVING A SUBSTRATE WITH A CLEAVING TECHNIQUE
A method of removing a substrate from III-nitride based semiconductor layers with a cleaving technique. A growth restrict mask is formed on or above a substrate, and one or more III-nitride based semiconductor layers are grown on or above the substrate using the growth restrict mask. The III-nitride based semiconductor layers are bonded to a support substrate or film, and the III-nitride based semiconductor layers are removed from the substrate using a cleaving technique on a surface of the substrate. Stress may be applied to the III-nitride based semiconductor layers, due to differences in thermal expansion between the III-nitride substrate and the support substrate or film bonded to the III-nitride based semiconductor layers, before the III-nitride based semiconductor layers are removed from the substrate. Once removed, the substrate can be recycled, resulting in cost savings for device fabrication.
TRANSFER PROCESS TO REALIZE SEMICONDUCTOR DEVICES
A method of fabricating and transferring high quality and manufacturable light-emitting devices, such as micro-sized light-emitting diodes (μLEDs), edge-emitting lasers and vertical-cavity surface-emitting lasers (VCSELs), using epitaxial later over-growth (ELO) and isolation methods. III-nitride semiconductor layers are grown on a host substrate using a growth restrict mask, and the III-nitride semiconductor layers on wings of the ELO are then made into the light-emitting devices. The devices are isolated from the host substrate to a thickness equivalent to the growth restrict mask and then transferred or lifted from of the host substrate. Back-end processing of the devices is then performed, such as attaching distributed Bragg reflector (DBR) mirrors, forming cladding layers, and/or adding heatsinks.
METHODS OF MANUFACTURING SEMICONDUCTOR STRUCTURE
The present application provides a method of manufacturing a semiconductor structure. Due to different hole ratios of openings of a mask corresponding to one unit region of a substrate, flow rates of reactive gas in openings are different when growing a light emitting layer. In this way, growth rates of the light emitting layers in openings are different, and doping efficiencies of the light emitting layers in openings are different, such that composition proportions of respective elements in the grown light emitting layer are different, and the light emitting wavelengths of LEDs are different. The processes are simple, and a semiconductor structure applied to a full-color LED can be manufactured on one substrate, which can reduce a size of the full-color LED.
LIGHT-EMITTING STRUCTURE, METHOD FOR PRODUCING THE LIGHT-EMITTING STRUCTURE, AND LIGHT-EMITTING DEVICE
A light-emitting structure includes an n-type layer, an active layer, and a p-type layer. The active layer has N quantum well structure periods, each of the N quantum-well structure periods has a well layer and at least one barrier layer. The N quantum-well structure periods include a first light-emitting section and a second light-emitting section. The first light-emitting section is closer to the n-type layer than the second light-emitting section. A method for producing the light-emitting structure, and a light-emitting device that has the light-emitting structure are also disclosed.
NANOROD LED, DISPLAY APPARATUS INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE NANOROD LED
Provided are nanorod light emitting diodes (LEDs), display apparatuses, and manufacturing methods thereof. The nanorod LED includes a first-type semiconductor layer including a body and a pyramidal structure continuously provided from the body, a nitride light emitting layer provided on the pyramidal structure, and a second-type semiconductor layer provided in the nitride light emitting layer.
SEMICONDUCTOR STRUCTURES AND METHODS OF MANUFACTURING THE SAME
This application provides semiconductor structures and methods of manufacturing the same. A semiconductor structure includes: an N-type semiconductor layer, a light emitting layer, and a P-type ion doped layer that are disposed from bottom to up, wherein the P-type ion doped layer comprises an activated region and non-activated regions located on two sides of the activated region, P-type doping ions in the activated region are activated, and P-type doping ions in the non-activated region are passivated. The layout of the activated region and the non-activated regions makes an LED include: a high-efficiency light emitting region and light emitting obstacle regions located on two sides of the high-efficiency light emitting region.