H01L33/22

Light-emitting device

A light-emitting device includes a semiconductor structure including a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a via penetrating the second semiconductor layer and the active layer to expose a surface of the first semiconductor layer; a first electrode formed in the via and on the second semiconductor layer; a second electrode formed on the second semiconductor layer; and an insulating structure covering the first electrode, the second electrode and the semiconductor structure and including a first opening to expose the first electrode and a second opening to expose the second electrode, wherein the first electrode and the second electrode respectively include a metal layer contacting the insulating layer, the metal layer includes a material including a surface tension value larger than 1500 dyne/cm and a standard reduction potential larger than 0.3 V.

Display apparatus and method of manufacturing the same

Provided are a display apparatus and a method of manufacturing the same. The display apparatus includes a support substrate, a driving layer provided on the support substrate and including a driving element configured to apply power to a pixel electrode, and a light-emitting layer provided on the driving layer.

Display apparatus and method of manufacturing the same

Provided are a display apparatus and a method of manufacturing the same. The display apparatus includes a support substrate, a driving layer provided on the support substrate and including a driving element configured to apply power to a pixel electrode, and a light-emitting layer provided on the driving layer.

Light-emitting device

A light-emitting device comprises a substrate comprising a sidewall, a first top surface, and a second top surface, wherein the second top surface is closer to the sidewall of the substrate than the first top surface to the sidewall of the substrate; a semiconductor stack formed on the substrate comprising a first semiconductor layer, an active layer, and a second semiconductor layer; a dicing street surrounding the semiconductor stack, and exposing the first top surface and the second top surface of the substrate; a protective layer covering the semiconductor stack; a reflective layer comprising a Distributed Bragg Reflector structure covering the protective layer; and a cap layer covering the reflective layer, wherein the second top surface of the substrate is not covered by the protective layer, the reflective layer, and the cap layer.

Light emitting device
11705476 · 2023-07-18 · ·

A light emitting device including a plurality of pixels is provided by the present disclosure. Each of the plurality of pixels includes at least two light emitting diodes, and the at least two light emitting didoes are electrically connected with each other in series, wherein the at least two light emitting diodes have peak external quantum efficiencies under different currents.

Light emitting device
11705476 · 2023-07-18 · ·

A light emitting device including a plurality of pixels is provided by the present disclosure. Each of the plurality of pixels includes at least two light emitting diodes, and the at least two light emitting didoes are electrically connected with each other in series, wherein the at least two light emitting diodes have peak external quantum efficiencies under different currents.

ENHANCED LIGHT EXTRACTION FROM LIGHT EMITTING DIODES UTILIZING A NANOPARTICLE META-GRID

Light extraction efficiency of existing semiconductor light emitting devices can be increased significantly by introducing a nanoparticle ‘meta-grid’ on top of a conventional light emitting diode (LED) chip, within its usual encapsulating packaging or casing. The ‘meta-grid’ is essentially a monolayer or a 2D array of sub-wavelength metallic nanoparticles (NPs) with sub-wavelength inter-particle separation. The local dielectric environment around the NPs and within the gaps between the NPs could be the same as the encapsulant, or any other optically transparent material with refractive index close to that of the encapsulant. Upon optical excitation, the collective oscillations of conduction electrons, or surface plasmon, of the metallic NPs give rise to localized surface plasmon resonances. When placed on top of the LED chip, which acts as a high refractive index substrate for the NPs, these NPs can couple strongly to the light emitted by the chip, acting as efficient resonant plasmonic antennae or scatterers for light. The plasmon-mediated light coupling can by optimized by tuning the composition, size, and shape of the NPs, their inter-particle gaps and their distance from the LED chip surface. By virtue of the localized-surface-plasmon-enhanced light transmission through the optimized NP ‘meta-grid’, the efficiency of extraction of the light generated by the semiconductor LED chip into its encapsulating casing can be significantly improved.

ENHANCED LIGHT EXTRACTION FROM LIGHT EMITTING DIODES UTILIZING A NANOPARTICLE META-GRID

Light extraction efficiency of existing semiconductor light emitting devices can be increased significantly by introducing a nanoparticle ‘meta-grid’ on top of a conventional light emitting diode (LED) chip, within its usual encapsulating packaging or casing. The ‘meta-grid’ is essentially a monolayer or a 2D array of sub-wavelength metallic nanoparticles (NPs) with sub-wavelength inter-particle separation. The local dielectric environment around the NPs and within the gaps between the NPs could be the same as the encapsulant, or any other optically transparent material with refractive index close to that of the encapsulant. Upon optical excitation, the collective oscillations of conduction electrons, or surface plasmon, of the metallic NPs give rise to localized surface plasmon resonances. When placed on top of the LED chip, which acts as a high refractive index substrate for the NPs, these NPs can couple strongly to the light emitted by the chip, acting as efficient resonant plasmonic antennae or scatterers for light. The plasmon-mediated light coupling can by optimized by tuning the composition, size, and shape of the NPs, their inter-particle gaps and their distance from the LED chip surface. By virtue of the localized-surface-plasmon-enhanced light transmission through the optimized NP ‘meta-grid’, the efficiency of extraction of the light generated by the semiconductor LED chip into its encapsulating casing can be significantly improved.

LIGHT EMITTING DIODE (LED) STACK FOR A DISPLAY

A light emitting diode (LED) pixel for a display including a first LED stack having a first well layer, a second LED stack disposed on the first LED stack and having a second well layer, a third LED stack disposed on the second LED stack and having a third well layer, a first electrode disposed on the first LED stack and in ohmic contact with the first LED stack, a second electrode disposed on the second LED stack and in ohmic contact with a surface of the second LED stack, and a third electrode in ohmic contact with a surface of the third LED stack, in which the first well layer includes at least one base material different from that of the second well layer.

SEMICONDUCTOR LIGHT-EMITTING ELEMENT AND METHOD OF MANUFACTURING SEMICONDUCTOR LIGHT-EMITTING ELEMENT
20230223499 · 2023-07-13 ·

A semiconductor light-emitting element includes: an n-type semiconductor layer; an active layer; a p-side contact electrode made of Rh; a p-side electrode covering layer made of Ti or TiN that covers the p-side contact electrode; a first protective layer made of SiO.sub.2 or SiON that covers an upper surface and a side surface of the p-side electrode covering layer in a portion different from that of a first p-side pad opening; a second protective layer made of Al.sub.2O.sub.3 that covers the first protective layer, a side surface of a p-side semiconductor layer, and a side surface of the active layer in a portion different from that of a second p-side pad opening; and a p-side pad electrode that is in contact with the p-side electrode covering layer in the first p-side pad opening and the second p-side pad opening.