A light emitting element includes: a substrate including a first surface including a first region and a second region; a first semiconductor layered body on the first region, the first semiconductor layered body comprising a first light emitting layer and including: a first lateral surface, and a second lateral surface opposite to the first lateral surface; and a second semiconductor layered body on the second region, the second semiconductor layered body comprising a second light emitting layer and including: a first lateral surface facing the second lateral surface and located on a first semiconductor layered body side of the second semiconductor layered body, and a second lateral surface opposite to the first lateral surface and located on a side opposite the first semiconductor layered body side of the second semiconductor layered body.

A light emitting element includes: a substrate including a first surface including a first region and a second region; a first semiconductor layered body on the first region, the first semiconductor layered body comprising a first light emitting layer and including: a first lateral surface, and a second lateral surface opposite to the first lateral surface; and a second semiconductor layered body on the second region, the second semiconductor layered body comprising a second light emitting layer and including: a first lateral surface facing the second lateral surface and located on a first semiconductor layered body side of the second semiconductor layered body, and a second lateral surface opposite to the first lateral surface and located on a side opposite the first semiconductor layered body side of the second semiconductor layered body.

A process for the production of a layer structure of a nitride semiconductor component on a silicon surface, comprising: provision of a substrate having a silicon surface; deposition of an aluminium-containing nitride nucleation layer on the silicon surface of the substrate; optional: deposition of an aluminium-containing nitride buffer layer on the nitride nucleation layer; deposition of a masking layer on the nitride nucleation layer or, if present, on the first nitride buffer layer; deposition of a gallium-containing first nitride semiconductor layer on the masking layer, wherein the masking layer is deposited in such a way that, in the deposition step of the first nitride semiconductor layer, initially separate crystallites grow that coalesce above a coalescence layer thickness and occupy an average surface area of at least 0.16 μm.sup.2 in a layer plane of the coalesced nitride semiconductor layer that is perpendicular to the growth direction.

A process for the production of a layer structure of a nitride semiconductor component on a silicon surface, comprising: provision of a substrate having a silicon surface; deposition of an aluminium-containing nitride nucleation layer on the silicon surface of the substrate; optional: deposition of an aluminium-containing nitride buffer layer on the nitride nucleation layer; deposition of a masking layer on the nitride nucleation layer or, if present, on the first nitride buffer layer; deposition of a gallium-containing first nitride semiconductor layer on the masking layer, wherein the masking layer is deposited in such a way that, in the deposition step of the first nitride semiconductor layer, initially separate crystallites grow that coalesce above a coalescence layer thickness and occupy an average surface area of at least 0.16 μm.sup.2 in a layer plane of the coalesced nitride semiconductor layer that is perpendicular to the growth direction.

An optoelectronic component (10) is specified, comprising a semiconductor body (6) with an active region (4) suitable for emission of radiation and comprising a quantum well structure, wherein the quantum well structure comprises at least one quantum well layer (41) and barrier layers (42), a first electrical contact (1) and a second electrical contact (2), wherein the active region (4) comprises at least one intermixed region (44) and at least one non-intermixed region (43).

The at least one quantum well layer (41) and the barrier layers (42) are at least partially intermixed in the intermixed region (44), such that the intermixed region (44) comprises a larger electronic bandgap than the at least one quantum well layer (41) in the non-intermixed region (43). The first electrical contact (1) is a metal contact arranged on a radiation exit surface of the semiconductor body (6), wherein the intermixed region (44) is arranged below the first contact (1) in the vertical direction. Further, a method for producing the optoelectronic component (10) is specified.

An optoelectronic component (10) is specified, comprising a semiconductor body (6) with an active region (4) suitable for emission of radiation and comprising a quantum well structure, wherein the quantum well structure comprises at least one quantum well layer (41) and barrier layers (42), a first electrical contact (1) and a second electrical contact (2), wherein the active region (4) comprises at least one intermixed region (44) and at least one non-intermixed region (43).

The at least one quantum well layer (41) and the barrier layers (42) are at least partially intermixed in the intermixed region (44), such that the intermixed region (44) comprises a larger electronic bandgap than the at least one quantum well layer (41) in the non-intermixed region (43). The first electrical contact (1) is a metal contact arranged on a radiation exit surface of the semiconductor body (6), wherein the intermixed region (44) is arranged below the first contact (1) in the vertical direction. Further, a method for producing the optoelectronic component (10) is specified.

In an embodiment an optoelectronic device includes an epitaxial layer stack having at least a first epitaxial layer and a second epitaxial layer arranged above the first epitaxial layer, wherein the following layers are embedded in the epitaxial layer stack a first semiconductor layer of a first conductivity type, an active layer arranged above the first semiconductor layer and configured to generate light, and a second semiconductor layer of a second conductivity type arranged above the active layer, wherein an interface between the first epitaxial layer and the second epitaxial layer extends at least partially through the first semiconductor layer and/or the second semiconductor layer, and wherein the active layer is embedded in a non-doped barrier layer, the barrier layer covering one or more side surfaces of the active layer.

In an embodiment an optoelectronic device includes an epitaxial layer stack having at least a first epitaxial layer and a second epitaxial layer arranged above the first epitaxial layer, wherein the following layers are embedded in the epitaxial layer stack a first semiconductor layer of a first conductivity type, an active layer arranged above the first semiconductor layer and configured to generate light, and a second semiconductor layer of a second conductivity type arranged above the active layer, wherein an interface between the first epitaxial layer and the second epitaxial layer extends at least partially through the first semiconductor layer and/or the second semiconductor layer, and wherein the active layer is embedded in a non-doped barrier layer, the barrier layer covering one or more side surfaces of the active layer.

A display device includes a lower metal layer disposed on a surface of a substrate and including a first opening overlapping a rear emission pixel in a plan view; a first electrode and a second electrode disposed in each of the rear emission pixel and a front emission pixel, the first electrode and the second electrode being spaced apart from each other on the lower metal layer; first light emitting elements disposed between the first electrode and the second electrode disposed in the rear emission pixel; second light emitting elements disposed between the first electrode and the second electrode disposed in the front emission pixel; and a reflective layer disposed on the first light emitting elements and overlapping the rear emission pixel in a plan view, the reflective layer overlaps at least one of the first light emitting elements in a plan view.

A display device includes a lower metal layer disposed on a surface of a substrate and including a first opening overlapping a rear emission pixel in a plan view; a first electrode and a second electrode disposed in each of the rear emission pixel and a front emission pixel, the first electrode and the second electrode being spaced apart from each other on the lower metal layer; first light emitting elements disposed between the first electrode and the second electrode disposed in the rear emission pixel; second light emitting elements disposed between the first electrode and the second electrode disposed in the front emission pixel; and a reflective layer disposed on the first light emitting elements and overlapping the rear emission pixel in a plan view, the reflective layer overlaps at least one of the first light emitting elements in a plan view.