Patent classifications
H01L33/28
Devices, structures, materials and methods for vertical light emitting transistors and light emitting displays
Devices, structures, materials and methods for vertical light emitting transistors (VLETs) and light emitting displays (LEDs) are provided. In particular, architectures for vertical polymer light emitting transistors (VPLETs) for active matrix organic light emitting displays (AMOLEDs) and AMOLEDs incorporating such VPLETs are described. Porous conductive transparent electrodes (such as from nanowires (NW)) alone or in combination with conjugated light emitting polymers (LEPs) and dielectric materials are utilized in forming organic light emitting transistors (OLETs). Combinations of thin films of ionic gels, LEDs, porous conductive electrodes and relevant substrates and gates are utilized to construct LETs, including singly and doubly gated VPLETs. In addition, printing processes are utilized to deposit layers of one or more of porous conductive electrodes, LEDs, and dielectric materials on various substrates to construct LETs, including singly and doubly gated VPLETs.
Devices, structures, materials and methods for vertical light emitting transistors and light emitting displays
Devices, structures, materials and methods for vertical light emitting transistors (VLETs) and light emitting displays (LEDs) are provided. In particular, architectures for vertical polymer light emitting transistors (VPLETs) for active matrix organic light emitting displays (AMOLEDs) and AMOLEDs incorporating such VPLETs are described. Porous conductive transparent electrodes (such as from nanowires (NW)) alone or in combination with conjugated light emitting polymers (LEPs) and dielectric materials are utilized in forming organic light emitting transistors (OLETs). Combinations of thin films of ionic gels, LEDs, porous conductive electrodes and relevant substrates and gates are utilized to construct LETs, including singly and doubly gated VPLETs. In addition, printing processes are utilized to deposit layers of one or more of porous conductive electrodes, LEDs, and dielectric materials on various substrates to construct LETs, including singly and doubly gated VPLETs.
Luminous body, light emitting film, light emitting diode and light emitting device having luminous body
A luminous body includes a first moiety including a plurality of first ligands combined to a surface of an inorganic emitting particle; and a second moiety including silsesquioxanes connected to a second ligand connected to one of the first ligands, wherein one of the first and second ligands is a polar ligand, and the other one of the first and second ligands is a non-polar ligand.
Luminous body, light emitting film, light emitting diode and light emitting device having luminous body
A luminous body includes a first moiety including a plurality of first ligands combined to a surface of an inorganic emitting particle; and a second moiety including silsesquioxanes connected to a second ligand connected to one of the first ligands, wherein one of the first and second ligands is a polar ligand, and the other one of the first and second ligands is a non-polar ligand.
SEMICONDUCTOR LIGHT EMITTING DEVICE AND MANUFACTURING METHOD
The present invention provides a semiconductor light emitting device including a substrate, a first semiconductor layer, a first cladding layer, an active layer, a second cladding layer and a second semiconductor layer, and a manufacturing method. The first semiconductor layer may be an n-type semiconductor including a III-V semiconductor or a II-VI semiconductor. The second semiconductor layer may be a p-type semiconductor including a I-VII semiconductor. The semiconductor light emitting device may further include a third cladding layer between the active layer and the second cladding layer, the third cladding layer including a III-V semiconductor or a II-VI semiconductor. Therefore, by providing the hybrid type semiconductor light emitting device and the manufacturing method thereof, the luminous efficiency limit of the p-type semiconductor can be overcome.
SEMICONDUCTOR LIGHT EMITTING DEVICE AND MANUFACTURING METHOD
The present invention provides a semiconductor light emitting device including a substrate, a first semiconductor layer, a first cladding layer, an active layer, a second cladding layer and a second semiconductor layer, and a manufacturing method. The first semiconductor layer may be an n-type semiconductor including a III-V semiconductor or a II-VI semiconductor. The second semiconductor layer may be a p-type semiconductor including a I-VII semiconductor. The semiconductor light emitting device may further include a third cladding layer between the active layer and the second cladding layer, the third cladding layer including a III-V semiconductor or a II-VI semiconductor. Therefore, by providing the hybrid type semiconductor light emitting device and the manufacturing method thereof, the luminous efficiency limit of the p-type semiconductor can be overcome.
Light emitting device having an optically pumped semiconductor wavelength converting element
Embodiments of the invention include a semiconductor light emitting device capable of emitting first light having a first peak wavelength and a semiconductor wavelength converting element capable of absorbing the first light and emitting second light having a second peak wavelength. The semiconductor wavelength converting element is attached to a support and disposed in a path of light emitted by the semiconductor light emitting device. The semiconductor wavelength converting element is patterned to include at least two first regions of semiconductor wavelength converting material and at least one second region without semiconductor wavelength converting material disposed between the at least two first regions.
Light emitting device having an optically pumped semiconductor wavelength converting element
Embodiments of the invention include a semiconductor light emitting device capable of emitting first light having a first peak wavelength and a semiconductor wavelength converting element capable of absorbing the first light and emitting second light having a second peak wavelength. The semiconductor wavelength converting element is attached to a support and disposed in a path of light emitted by the semiconductor light emitting device. The semiconductor wavelength converting element is patterned to include at least two first regions of semiconductor wavelength converting material and at least one second region without semiconductor wavelength converting material disposed between the at least two first regions.
Light source for plant cultivation
A plant cultivation light module includes a first light source, a second light source, and a controller. The first light source includes a first light emitter configured to emit first light having peak wavelength in a visible range and second light emitter configured to emit second light having a longer peak wavelength to the first light. The second light source includes a plurality of third light emitters configured to emit third light having a shorter peak wavelength to the first light. The controller is configured to control the first light emitter, the second light emitter and the plurality of third light emitters and provide a first light pattern and a second light pattern. The first light source supplies light of the first light pattern and the second light source supplies light of the second pattern to the plant, respectively.
METHODS AND MATERIAL DEPOSITION SYSTEMS FOR FORMING SEMICONDUCTOR LAYERS
In embodiments, an optoelectronic device comprises a substrate formed of magnesium oxide, and a multi-region stack epitaxially deposited upon the substrate. The multi-region stack may comprise a non-polar crystalline material structure along a growth direction, or may comprise a crystal polarity having an oxygen-polar crystal structure or a metal-polar crystal structure along the growth direction. In some cases, at least one region of the multi-region stack is a bulk semiconductor material comprising Mg.sub.(x)Zn.sub.(1-x)O. In some cases, at least one region of the multi-region stack is a superlattice comprising MgO and Mg.sub.(x)Zn.sub.(1-x)O.