A display device includes a plurality of pixel tiles spaced apart from each other, each of the pixel tiles including a substrate and a plurality of light emitting stacked structures disposed on the substrate, in which a distance between two adjacent light emitting stacked structures in the same pixel tile is substantially equal to a shortest distance between two adjacent light emitting stacked structures of different pixel tiles.

A display device includes a plurality of pixel tiles spaced apart from each other, each of the pixel tiles including a substrate and a plurality of light emitting stacked structures disposed on the substrate, in which a distance between two adjacent light emitting stacked structures in the same pixel tile is substantially equal to a shortest distance between two adjacent light emitting stacked structures of different pixel tiles.

A light-emitting diode includes a light-emitting epitaxial layer having a first surface as a light-emitting surface and a second, opposing, surface, including a first type semiconductor layer, an active layer, and a second type semiconductor layer; a metal reflective layer disposed over the second surface; and a protective layer formed seamlessly on a surface of the metal reflective layer and on a side wall of the metal reflective layer.

A light-emitting diode includes a light-emitting epitaxial layer having a first surface as a light-emitting surface and a second, opposing, surface, including a first type semiconductor layer, an active layer, and a second type semiconductor layer; a metal reflective layer disposed over the second surface; and a protective layer formed seamlessly on a surface of the metal reflective layer and on a side wall of the metal reflective layer.

In an embodiment a method for producing optoelectronic semiconductor chips includes A) growing an AlInGaAsP semiconductor layer sequence on a growth substrate along a growth direction, wherein the semiconductor layer sequence includes an active zone for radiation generation, and wherein the active zone is composed of a plurality of alternating quantum well layers and barrier layers, B) generating a structured masking layer, C) regionally intermixing the quantum well layers and the barrier layers by applying an intermixing auxiliary through openings of the masking layer into the active zone in at least one intermixing region and D) singulating the semiconductor layer sequence into sub-regions for the semiconductor chips, wherein the barrier layers in A) are grown from [(Al.sub.xGa.sub.1-x).sub.yIn.sub.1-y].sub.zP.sub.1-z with x≥0.5, and wherein the quantum well layers are grown in A) from [(Al.sub.aGa.sub.1-a).sub.bIn.sub.1-b].sub.cP.sub.1-c with o<a≤0.2.

In an embodiment a method for producing optoelectronic semiconductor chips includes A) growing an AlInGaAsP semiconductor layer sequence on a growth substrate along a growth direction, wherein the semiconductor layer sequence includes an active zone for radiation generation, and wherein the active zone is composed of a plurality of alternating quantum well layers and barrier layers, B) generating a structured masking layer, C) regionally intermixing the quantum well layers and the barrier layers by applying an intermixing auxiliary through openings of the masking layer into the active zone in at least one intermixing region and D) singulating the semiconductor layer sequence into sub-regions for the semiconductor chips, wherein the barrier layers in A) are grown from [(Al.sub.xGa.sub.1-x).sub.yIn.sub.1-y].sub.zP.sub.1-z with x≥0.5, and wherein the quantum well layers are grown in A) from [(Al.sub.aGa.sub.1-a).sub.bIn.sub.1-b].sub.cP.sub.1-c with o<a≤0.2.

A micro-light emitting diode includes a mesa structure that includes a first set of one or more semiconductor layers, an active layer configured to emit light, a second set of one or more semiconductor layers on the active layer, and a dielectric layer in sidewall regions of the mesa structure. A center region of the second set of one or more semiconductor layers is thicker than a sidewall region of the second set of one or more semiconductor layers, such that a distance from a surface of the sidewall region of the second set of one or more semiconductor layers to the active layer is less than a distance from a surface of the center region of the second set of one or more semiconductor layers to the active layer, thereby forming a surface potential-induced lateral potential barrier at a sidewall region of the active layer.

A micro-light emitting diode includes a mesa structure that includes a first set of one or more semiconductor layers, an active layer configured to emit light, a second set of one or more semiconductor layers on the active layer, and a dielectric layer in sidewall regions of the mesa structure. A center region of the second set of one or more semiconductor layers is thicker than a sidewall region of the second set of one or more semiconductor layers, such that a distance from a surface of the sidewall region of the second set of one or more semiconductor layers to the active layer is less than a distance from a surface of the center region of the second set of one or more semiconductor layers to the active layer, thereby forming a surface potential-induced lateral potential barrier at a sidewall region of the active layer.

Disclosed herein are light emitting diode devices having one or more high reflectivity mesa sidewall electrodes and methods of fabricating thereof.

A light-emitting device comprises a semiconductor stack comprising a first semiconductor layer and a second semiconductor layer, wherein in a top view, the semiconductor stack comprises an outer peripheral region and an inner region, the outer peripheral region exposes the first semiconductor layer, and the second semiconductor layer is disposed in the inner region; an outer insulated structure comprising an insulation layer and a protective layer, the insulation layer comprising a plurality of first insulation layer outer openings and a second insulation layer opening; a first electrode covering the plurality of first insulation layer outer openings; and a second electrode covering the second insulation layer opening, wherein the outer insulated structure comprises a total thickness gradually decreasing from the outer peripheral region to the inner region.