Patent classifications
H01L33/385
OPTICAL SEMICONDUCTOR ELEMENT
An optical semiconductor element includes: a substrate; a semiconductor stacked body including an optical layer, a first semiconductor layer, and a second semiconductor layer, the optical layer and the first semiconductor layer forming a mesa portion and the second semiconductor layer including an outer portion; a first electrode formed on the mesa portion and connected to the first semiconductor layer; a first insulating layer formed on the first electrode; a second electrode including a first portion connected to the second semiconductor layer at the outer portion and a second portion arranged on the first insulating layer so as to overlap the first electrode; and a second insulating layer formed on the second electrode. An opening for exposing the first electrode is formed in the first insulating layer. An opening for exposing the second portion of the second electrode is formed in the second insulating layer.
3-D structure for increasing contact surface area for LEDs
Disclosed herein is an apparatus including a first three-dimensional (3-D) structure, a second 3-D structure, and a conductive layer. The first 3D structure includes a first-type doped semiconductor material having a semi-polar facet. The second 3-D structure forms a light-emitting diode (LED) and includes a second-type doped semiconductor material, an active layer, and the first-type doped semiconductor material. The conductive layer at least partially overlays and is in ohmic contact with the semi-polar facet. The conductive layer is configured to carry current that flows between the semi-polar facet and the active layer. In some embodiments, the first-type doped semiconductor material may include an N-type doped semiconductor material, and the second-type doped semiconductor material may include a P-type doped semiconductor material. The first-type doped semiconductor material of both 3-D structures may be etched from a common first-type doped semiconductor epitaxial layer.
OPTICAL PROJECTION DEVICE HAVING A GRID STRUCTURE
An optical projection device and a method of producing the optical projection device are described. The optical projection device includes: a plurality of LEDs (light-emitting diodes), the LEDs each including a semiconductor mesa laterally spaced apart from one another by a grid structure. Each of the semiconductor mesas includes an n-type material and a p-type material adjoining at least partly the n-type material. The grid structure at least partly laterally surrounds at least the n-type material of each of the semiconductor mesas. The grid structure includes a conductive material that electrically interconnects the n-type material of the semiconductor mesas. The grid structure is configured to block optical crosstalk between light emitted by the LEDs.
Passivation for a semiconductor light emitting device
In embodiments of the invention, a passivation layer is disposed over a side of a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A material configured to adhere to an underfill is disposed over an etched surface of the semiconductor structure.
LIGHT EMITTING DEVICE
A light emitting device includes a semiconductor structure, an insulating layer, a first electrode, a second electrode, and a third electrode. The semiconductor structure includes a first type semiconductor layer, a second type semiconductor layer, and an active layer disposed between the first type semiconductor layer and the second type semiconductor layer. The insulating layer is disposed on the semiconductor structure. The first electrode is electrically connected to the first type semiconductor layer. The second electrode is electrically connected to the second type semiconductor layer. The first electrode, the second electrode, and the third electrode are structurally separated. The third electrode at least has a first portion. The first portion of the third electrode is disposed on a side wall of the semiconductor structure, and the insulating layer is located between the third electrode and the semiconductor structure.
OPTICAL DEVICES WITH LATERAL CURRENT INJECTION
In a general aspect, a micro-LED includes a semiconductor mesa having a lateral dimension less than 5 um along a horizontal direction of the micro-LED, and a contact formed on a non-horizontal face of the semiconductor mesa. The semiconductor mesa includes a plurality of quantum wells (QWs), and a p-type semiconductor layer formed between the contact and the plurality of QWs. The contact, the p-type semiconductor layer and the plurality of QWs are configured such that, when the micro-LED is driven at an effective current density less than 50 A/cm2, holes are injected from the contact to the plurality of QWs through the p-type semiconductor layer. The injected holes diffuse laterally in the plurality of QWs over a distance greater than 1 micrometer (μm).
Light emitting device having columnar parts surrounded by concavo-convex shapes and projector
A light emitting device includes a substrate, a first semiconductor layer provided to the substrate, a laminated structure disposed at an opposite side to the substrate of the first semiconductor layer, and including a plurality of columnar parts, a first electrically-conductive layer as a surface layer at laminated structure side in the first semiconductor layer, and a second electrically-conductive layer opposed to the first electrically-conductive layer via the laminated structure, wherein the columnar part includes a light emitting layer configured to emit light, a second semiconductor layer which is disposed between the light emitting layer and the first electrically-conductive layer, and a third semiconductor layer disposed between the light emitting layer and the second electrically-conductive layer, concavo-convex shapes are formed on a surface of the first electrically-conductive layer, an insulating layer is disposed on the first electrically-conductive layer, and electrode layers are disposed so as to cover an area where the insulating layer is disposed, and some of the concavo-convex shapes.
HIGHLY EFFICIENT MICRODEVICES
Methods and structures are disclosed for highly efficient vertical devices. The vertical device comprising a plurality of planar active layers formed on a substrate, at least one of a top layer of the plurality of the layers is formed as a plurality of nano-pillars and a passivation layer formed on a space between the plurality of the nanopillars.
METHOD OF MANUFACTURING SEMICONDUCTOR LIGHT EMITTING DEVICE
A semiconductor light emitting device includes a light emitting structure having a rod shape with first and second surfaces opposing each other and a side surface connected between the first and second surfaces, and including a first conductivity-type semiconductor providing the first surface, an active layer and a second conductivity-type semiconductor, a first electrode layer on a first region of the first surface of the light emitting structure and connected to the first conductivity-type semiconductor, the first region having a level that is vertically offset from a level of a second region adjacent thereto, and a second electrode layer connected to the second conductivity-type semiconductor.
DISPLAY DEVICE USING MICRO LED AND METHOD FOR MANUFACTURING SAME
The present specification provides a semiconductor light emitting element having a new structure with a wider light emitting area than a conventional structure, when implementing a display device by using semiconductor light emitting elements. A semiconductor light emitting element according to one embodiment of the present invention is characterized by comprising: a first conductive-type semiconductor layer having a first side inclination angle; a second conductive-type semiconductor layer having a second side inclination angle, which is positioned on the first conductive-type semiconductor layer; and an active layer having a third side inclination angle, which is disposed between the first conductive-type semiconductor layer and the second conductive-type semiconductor layer, wherein the second side inclination angle and the third side inclination angle are the same.