Patent classifications
H01L2223/54486
Semiconductor devices having exposed clip top sides and methods of manufacturing semiconductor devices
In one example, a method of manufacturing a semiconductor device includes providing a substrate having substrate terminals and providing a component having a first component terminal and a second component terminal adjacent to a first major side of the component. The method includes providing a clip structure having a first clip, a second clip, and a clip connector coupling the first clip to the second clip. The method includes coupling the first clip to the first component terminal and a first substrate terminal and coupling the second clip to a second substrate terminal. The method includes encapsulating the component, portions of the substrate, and portions of the clip structure. the method includes removing a sacrificial portion of the clip connector while leaving a first portion of the clip connector attached to the first clip and leaving a second portion of the clip connector attached to the second clip. In some examples, the first portion of the clip connector includes a first portion surface, the second portion of the clip connector includes a second portion surface, and the first portion surface and the second portion surface are exposed from a top side of the encapsulant after the removing. Other examples and related structures are also disclosed herein.
Semiconductor device and method of manufacturing the same
A semiconductor device with improved reliability is provided. The semiconductor device is characterized by its embodiments in that sloped portions are formed on connection parts between a pad and a lead-out wiring portion, respectively. This feature suppresses crack formation in a coating area where a part of the pad is covered with a surface protective film.
MULTI-LAYERED STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
A method for manufacturing a multi-layered structure on a supporting entity is provided. The method includes forming a first layer and a first test mark on the supporting entity, wherein the first test mark has a first predetermined length. The first projected length of the first test mark is measured in a top view. The first warpage degree of the first test mark is calculated according to the first predetermined length and the first projected length.
RADIATION SENSOR DIES HAVING VISUAL IDENTIFIERS AND METHODS OF FABRICATING THEREOF
A method of fabricating radiation sensor dies includes forming a plurality of radiation-sensitive detector elements and a plurality of visible identifiers on at least some of the radiation-sensitive detector elements on a substrate, where each visible identifier is located in a different sub-region of the substrate containing a subset of the radiation-sensitive detector elements, and separating the sub-regions of the substrate from one another to provide a plurality of radiation sensor dies, where the visible identifier on each radiation sensor die uniquely identifies the radiation sensor die with respect to the other radiation sensor dies of the plurality of radiation sensor dies.
SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor chip and a metal plate. The semiconductor chip has first and second surfaces, four side surface, four corners, four sides. The four side surfaces connect the first surface and the second surface. Two of the four side surfaces contact each other at one of the four corners. The four side surfaces contact the second surface at the four sides. The first and second electrodes are provided at the first front side. The metal plate is connected to the second surface side of the semiconductor chip. The metal plate includes third and fourth surfaces, and a through-hole or a notch. The third surface is connected to the second surface of the semiconductor chip. The fourth surface is provided at a side opposite to the third surface. The through-hole or the notch extends through the metal plate from the fourth surface to the third surface.
METHOD FOR MANUFACTURING DISPLAY DEVICE, AND SUBSTRATE FOR MANUFACTURE OF DISPLAY DEVICE
Disclosed in the present specification are a substrate for transferring, with high reliability, a semiconductor light emitting element, and a method for manufacturing a display device by using same. Particularly, when a semiconductor light emitting element is self-assembled on an assembly substrate by using an electromagnetic field, an assembly groove in which a semiconductor light emitting element for alignment is assembled is formed in the assembly substrate. The semiconductor light emitting element for alignment, assembled in the assembly groove, is used for alignment in a step of being transferred to a final wiring substrate. Unlike conventional alignment keys, the semiconductor light emitting element for alignment reflects an alignment error of semiconductor light emitting elements that occurs during a transfer process after assembly. Therefore, when semiconductor light emitting elements are transferred to a wiring substrate on the basis of the semiconductor light emitting element for alignment, transfer accuracy can be improved.
SEMICONDUCTOR DEVICE
Provided is a semiconductor device capable of maintaining the flatness of a glass substrate and sufficiently protecting an end portion of the glass substrate. A semiconductor device according to one aspect of the present disclosure includes: a glass substrate including a first surface, a second surface opposite to the first surface, and a first side surface between the first surface and the second surface; wirings provided on the first and second surfaces; a first insulating film that covers the first surface; a second insulating film that covers the second surface; and a third insulating film that covers the first side surface, the third insulating film being continuous with at least one of the first and second insulating films.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
A semiconductor device includes a substrate; a semiconductor chip located on the substrate; a sealing resin covering the substrate and the semiconductor chip; and a mottled pattern located at an interface between the sealing resin and at least one of the substrate or the semiconductor chip.
Wiring member and semiconductor module including same
In a wiring member, an element connection portion, a plate connection portion, and an upper surface portion are at height positions different from one another. The element connection portion has a through hole, and the plate connection portion has a through hole and a chamfer. The upper surface portion which is not connected to another portion, has projections asymmetrically disposed on both side surfaces thereof. Owing to these features, the type, the orientation, and the front and the back of the wiring member can be easily distinguished. Accordingly, it is possible to prevent incorrect assembling of the wiring member in a semiconductor module.
Stack packages including supporter
A stack package is disclosed. A first semiconductor die and a supporter are disposed on a package substrate. The supporter may include a second side facing a first side of the first semiconductor die having a substantially inclined surface. A second semiconductor die is stacked on the first semiconductor die and on the supporter. An encapsulant layer is formed to fill a portion between the supporter and the first semiconductor die.