In an embodiment, a method includes: stacking a plurality of first dies to form a device stack; revealing testing pads of a topmost die of the device stack; testing the device stack using the testing pads of the topmost die; and after testing the device stack, forming bonding pads in the topmost die, the bonding pads being different from the testing pads.

A method of liquid assisted micro cold binding is provided. The method includes: forming a conductive pad on the substrate in which the conductive pad consists essentially of indium; forming a liquid layer on the conductive pad; placing a micro device having an electrode facing the conductive pad over the conductive pad such that the micro device is in contact with the liquid layer and is gripped by a capillary force produced by the liquid layer between the micro device and the conductive pad in which the electrode consists essentially of indium; and evaporating the liquid layer such that the electrode is bound to the conductive pad and is in electrical contact with the conductive pad.

A method of liquid assisted micro cold binding is provided. The method includes: forming a conductive pad on the substrate in which the conductive pad consists essentially of indium; forming a liquid layer on the conductive pad; placing a micro device having an electrode facing the conductive pad over the conductive pad such that the micro device is in contact with the liquid layer and is gripped by a capillary force produced by the liquid layer between the micro device and the conductive pad in which the electrode consists essentially of indium; and evaporating the liquid layer such that the electrode is bound to the conductive pad and is in electrical contact with the conductive pad.

A photoelectric conversion device including a plurality of substrates in a stacked state, the plurality of substrates including a first substrate and a second substrate electrically connected to each other, the photoelectric conversion device comprising: a memory cell unit including row-selection lines that are to be driven upon selection of a row of a memory cell array and column-selection lines that are to be driven upon selection of a column of the memory cell array; and a memory peripheral circuit unit that includes row-selection line connection portions and column-selection line connection portions so as to drive the row-selection lines and to drive the column-selection lines, wherein a first portion that is at least a part of the memory peripheral circuit unit is formed on the first substrate and the memory cell unit is formed on the second substrate.

A photoelectric conversion device including a plurality of substrates in a stacked state, the plurality of substrates including a first substrate and a second substrate electrically connected to each other, the photoelectric conversion device comprising: a memory cell unit including row-selection lines that are to be driven upon selection of a row of a memory cell array and column-selection lines that are to be driven upon selection of a column of the memory cell array; and a memory peripheral circuit unit that includes row-selection line connection portions and column-selection line connection portions so as to drive the row-selection lines and to drive the column-selection lines, wherein a first portion that is at least a part of the memory peripheral circuit unit is formed on the first substrate and the memory cell unit is formed on the second substrate.

Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a semiconductor device includes a first semiconductor structure, a second semiconductor structure, and a bonding interface between the first semiconductor structure and the second semiconductor structure. The first semiconductor structure includes a substrate, a first device layer disposed on the substrate, and a first bonding layer disposed above the first device layer and including a first bonding contact and a first bonding alignment mark. The second semiconductor structure includes a second device layer, and a second bonding layer disposed below the second device layer and including a second bonding contact and a second bonding alignment mark. The first bonding alignment mark is aligned with the second bonding alignment mark at the bonding interface, such that the first bonding contact is aligned with the second bonding contact at the bonding interface.

Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a semiconductor device includes a first semiconductor structure, a second semiconductor structure, and a bonding interface between the first semiconductor structure and the second semiconductor structure. The first semiconductor structure includes a substrate, a first device layer disposed on the substrate, and a first bonding layer disposed above the first device layer and including a first bonding contact and a first bonding alignment mark. The second semiconductor structure includes a second device layer, and a second bonding layer disposed below the second device layer and including a second bonding contact and a second bonding alignment mark. The first bonding alignment mark is aligned with the second bonding alignment mark at the bonding interface, such that the first bonding contact is aligned with the second bonding contact at the bonding interface.

A package substrate structure includes a first substrate, a second substrate, a plurality of conductive pillars and an adhesive layer. The first substrate includes a plurality of vias and a plurality of pads. The vias and the pads are disposed on the first substrate, and fills the vias. The second substrate is disposed opposite to the first substrate. Each conductive pillar is disposed between the first substrate and the second substrate, where each conductive pillar electrically connects each pad and the second substrate, and the adhesive layer fills the gaps between the conductive pillars. A bonding method of the package substrate structure is also provided.

Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a method for forming a semiconductor device is disclosed. A first device layer is formed on a first substrate. A first bonding layer including a first bonding contact and a first bonding alignment mark is formed above the first device layer. A second device layer is formed on a second substrate. A second bonding layer including a second bonding contact and a second bonding alignment mark is formed above the second device layer. The first bonding alignment mark is aligned with the second bonding alignment mark, such that the first bonding contact is aligned with the second bonding contact. The first substrate and the second substrate are bonded in a face-to-face manner, so that the first bonding contact is in contact with the second bonding contact at a bonding interface, and the first bonding alignment mark is in contact with the second bonding alignment mark at the bonding interface.

A method includes bonding a first device die with a second device die. The second device die is over the first device die. A passive device is formed in a combined structure including the first and the second device dies. The passive device includes a first and a second end. A gap-filling material is formed over the first device die, with the gap-filling material including portions on opposite sides of the second device die. The method further includes performing a planarization to reveal the second device die, with a remaining portion of the gap-filling material forming an isolation region, forming a first and a second through-vias penetrating through the isolation region to electrically couple to the first device die, and forming a first and a second electrical connectors electrically coupling to the first end and the second end of the passive device.