A method for a through-silicon-via (TSV) connector includes: providing a semiconductor wafer with a silicon substrate, wherein the semiconductor wafer has a frontside and a backside opposite to the frontside thereof; forming multiple holes in the silicon substrate of the semiconductor wafer; forming a first insulating layer at a sidewall and bottom of each of the holes; forming a metal layer over the semiconductor wafer and in each of the holes; polishing the metal layer outside each of the holes to expose a frontside surface of the metal layer in each of the holes; forming multiple metal bumps or pads each on the frontside surface of the metal layer in at least one of the holes; grinding a backside of the silicon substrate of the semiconductor wafer to expose a backside surface of the metal layer in each of the holes, wherein the backside surface of the metal layer in each of the holes and a backside surface of the silicon substrate of the semiconductor wafer are coplanar; and cutting the semiconductor wafer to form multiple through-silicon-via (TSV) connectors.

A method for a through-silicon-via (TSV) connector includes: providing a semiconductor wafer with a silicon substrate, wherein the semiconductor wafer has a frontside and a backside opposite to the frontside thereof; forming multiple holes in the silicon substrate of the semiconductor wafer; forming a first insulating layer at a sidewall and bottom of each of the holes; forming a metal layer over the semiconductor wafer and in each of the holes; polishing the metal layer outside each of the holes to expose a frontside surface of the metal layer in each of the holes; forming multiple metal bumps or pads each on the frontside surface of the metal layer in at least one of the holes; grinding a backside of the silicon substrate of the semiconductor wafer to expose a backside surface of the metal layer in each of the holes, wherein the backside surface of the metal layer in each of the holes and a backside surface of the silicon substrate of the semiconductor wafer are coplanar; and cutting the semiconductor wafer to form multiple through-silicon-via (TSV) connectors.

Implementations of a method of forming semiconductor packages may include: providing a wafer having a plurality of devices, etching one or more trenches on a first side of the wafer between each of the plurality of devices, applying a molding compound to the first side of the wafer to fill the one or more trenches; grinding a second side of the wafer to a desired thickness, and exposing the molding compound included in the one or more trenches. The method may include etching the second side of the wafer to expose a height of the molding compound forming one or more steps extending from the wafer, applying a back metallization to a second side of the wafer, and singulating the wafer at the one or more steps to form a plurality of semiconductor packages. The one or more steps may extend from a base of the back metallization.

The present invention discloses a package structure and a forming method thereof. The package structure includes a substrate and a redistribution layer. The redistribution layer includes a plurality of metal bumps distributed at intervals, at least the periphery of the metal bumps is covered with seed layers, and the seed layers of adjacent metal bumps are disconnected from each other. The seed layers of this embodiment have stable metallic characteristics, which may achieve effective protection of side walls of the metal bumps against metal-to-metal migration due to oxidation and corrosion of the metal bumps, thereby avoiding electrical leakage and failure of a chip and greatly increasing the reliability of the package structure.

The present invention discloses a package structure and a forming method thereof. The package structure includes a substrate and a redistribution layer. The redistribution layer includes a plurality of metal bumps distributed at intervals, at least the periphery of the metal bumps is covered with seed layers, and the seed layers of adjacent metal bumps are disconnected from each other. The seed layers of this embodiment have stable metallic characteristics, which may achieve effective protection of side walls of the metal bumps against metal-to-metal migration due to oxidation and corrosion of the metal bumps, thereby avoiding electrical leakage and failure of a chip and greatly increasing the reliability of the package structure.

A semiconductor device has a substrate and a first semiconductor die disposed over the substrate. A subpackage is also disposed over the substrate. A stiffener is disposed over the substrate around the first semiconductor die and subpackage. A heat spreader is disposed over the stiffener. The heat spreader is thermally coupled to the first semiconductor die. The heat spreader has an opening over the subpackage.

A semiconductor device has a substrate and a first semiconductor die disposed over the substrate. A subpackage is also disposed over the substrate. A stiffener is disposed over the substrate around the first semiconductor die and subpackage. A heat spreader is disposed over the stiffener. The heat spreader is thermally coupled to the first semiconductor die. The heat spreader has an opening over the subpackage.

A method includes bonding a first and a second package component on a top surface of a third package component, and dispensing a polymer. The polymer includes a first portion in a space between the first and the third package components, a second portion in a space between the second and the third package components, and a third portion in a gap between the first and the second package components. A curing step is then performed on the polymer. After the curing step, the third portion of the polymer is sawed to form a trench between the first and the second package components.

A method includes bonding a first and a second package component on a top surface of a third package component, and dispensing a polymer. The polymer includes a first portion in a space between the first and the third package components, a second portion in a space between the second and the third package components, and a third portion in a gap between the first and the second package components. A curing step is then performed on the polymer. After the curing step, the third portion of the polymer is sawed to form a trench between the first and the second package components.

A method of using a processing oven may include disposing at least one substrate in a chamber of the oven and activating a lamp assembly disposed above them to increase their temperature to a first temperature. A chemical vapor may be admitted into the chamber above the at least one substrate and an inert gas may be admitted into the chamber below the at least one substrate. The temperature of the at least one substrate may then be increased to a second temperature higher than the first temperature and then cooled down.