Disclosed herein are display devices having a left projector and a right projector. According to certain embodiments, a display device includes a first display package having a first LED die, a second LED die, a third LED die, and a first backplane die that is electrically connected to the first LED die, the second LED die, and the third LED die. Each of the first LED die, the second LED die, and the third LED die is symmetric about a first plane that is parallel to an emission direction of the first LED die and perpendicular to a longitudinal direction of the first LED die. The first backplane die is symmetric about a second plane that is parallel to the emission direction of the first LED die and parallel to the longitudinal direction of the first LED die.

Techniques disclosed herein relate to light extraction structures for micro-LED arrays. According to certain embodiments, a device includes an array of micro-LEDs characterized by a first pitch, and an array of micro-lenses on the array of micro-LEDs and characterized by a second pitch different from the first pitch. Each micro-lens in the array of micro-lenses corresponds to a respective micro-LED in the array of micro-LEDs. In some embodiments, the first pitch is greater than the second pitch such that a chief ray of light from each micro-LED in the array of micro-LEDs after passing through the corresponding micro-lens tilts in a respective direction towards a middle line of the device.

There is provided a bonding apparatus for bonding substrates together, which includes: a first holding part configured to adsorptively hold a first substrate by vacuum-drawing the first substrate on a lower surface of the first substrate; a second holding part provided below the first holding part and configured to adsorptively hold a second substrate by vacuum-drawing the second substrate on an upper surface of the second substrate; a pressing member provided in the first holding part and configured to press a central portion of the first substrate; and a plurality of substrate detection parts provided in the first holding part and configured to detect a detachment of the first substrate from the first holding part.

The present disclosure relates to a semiconductor device, a manufacturing method, a solid state image sensor, and electronic equipment that can achieve further improvement in reliability. Connection pads are formed in interlayer films provided respectively in interconnection layers of a sensor substrate on which a sensor surface having pixels is formed and a signal processing substrate configured to perform signal processing on the sensor substrate to make an electrical connection between the sensor substrate and the signal processing substrate. Then, a metal oxide film is formed between the interlayer films of the sensor substrate and the signal processing substrate, between the connection pad formed on a side toward the sensor substrate and the interlayer film on a side toward the signal processing substrate, and between the connection pad formed on the side toward the signal processing substrate and the interlayer film on the side toward the sensor substrate. The present technology can be applied to a laminated-type CMOS image sensor, for example.

A semiconductor structure including a first semiconductor die, a second semiconductor die, a passivation layer, an anti-arcing pattern, and conductive terminals is provided. The second semiconductor die is stacked over the first semiconductor die. The passivation layer covers the second semiconductor die and includes first openings for revealing pads of the second semiconductor die. The anti-arcing pattern is disposed over the passivation layer. The conductive terminals are disposed over and electrically connected to the pads of the second semiconductor die.

A semiconductor package includes: a lower semiconductor chip including a first semiconductor substrate, which includes a first semiconductor device on an active surface thereof and a protrusion defined by a recess region on an inactive surface thereof opposite to the active surface, a plurality of external connecting pads on a bottom surface of the first semiconductor substrate, and a plurality of through-electrodes electrically connected to the plurality of external connecting pads; and at least one upper semiconductor chip stacked on the protrusion of the lower semiconductor chip and electrically connected to the plurality of through-electrodes, the at least one upper semiconductor chip including a second semiconductor substrate which includes a second semiconductor device on an active surface thereof.

In a wafer to wafer bonding method, a first wafer is vacuum suctions on a first surface of a lower stage and a second wafer is vacuum suctioned on a second surface of an upper stage. Pressure is applied to a middle portion of the first wafer by a lower push rod and pressure is applied to a middle portion of the second wafer by an upper push rod. Bonding of the first and second wafers propagates radially outwards. A bonding propagation position of the first and second wafers is detected. A ratio of protruding lengths of the lower push rod and the upper push rod is changed according to the bonding propagation position.

In a wafer to wafer bonding method, a first wafer is vacuum suctions on a first surface of a lower stage and a second wafer is vacuum suctioned on a second surface of an upper stage. Pressure is applied to a middle portion of the first wafer by a lower push rod and pressure is applied to a middle portion of the second wafer by an upper push rod. Bonding of the first and second wafers propagates radially outwards. A bonding propagation position of the first and second wafers is detected. A ratio of protruding lengths of the lower push rod and the upper push rod is changed according to the bonding propagation position.

Representative techniques provide process steps for forming a microelectronic assembly, including preparing microelectronic components such as dies, wafers, substrates, and the like, for bonding. One or more surfaces of the microelectronic components are formed and prepared as bonding surfaces. The microelectronic components are stacked and bonded without adhesive at the prepared bonding surfaces.

Representative techniques provide process steps for forming a microelectronic assembly, including preparing microelectronic components such as dies, wafers, substrates, and the like, for bonding. One or more surfaces of the microelectronic components are formed and prepared as bonding surfaces. The microelectronic components are stacked and bonded without adhesive at the prepared bonding surfaces.