Wafer bonding methods and wafer bonding structures are provided. An exemplary wafer bonding method includes providing a first wafer; forming a first interlayer dielectric layer and a first bonding layer passing through the first interlayer dielectric layer on the surface of the first wafer; providing a second wafer; forming a second interlayer dielectric layer and a second bonding layer passing through the second interlayer dielectric layer on surface of the second wafer; forming a self-assembling layer on at least one of a surface of the first interlayer dielectric layer and a surface of the second interlayer dielectric layer; and bonding the first wafer with the second wafer, the first bonding layer and the second bonding layer being fixed with each other, and the first interlayer dielectric layer and the second interlayer dielectric layer being fixed with each other by the self-assembling molecular layer.

A method includes bonding a die to a substrate, where the substrate has a first redistribution structure, the die has a second redistribution structure, and the first redistribution structure is bonded to the second redistribution structure. A first isolation material is formed over the substrate and around the die. A first conductive via is formed, extending from a first surface of the substrate, where the first surface is opposite the second redistribution structure, the first conductive via contacting a first conductive element in the second redistribution structure. Forming the first conductive via includes patterning an opening in the substrate, extending the opening to expose the first conductive element, where extending the opening includes using a portion of a second conductive element in the first redistribution structure as an etch mask, and filling the opening with a conductive material.

A device includes a first semiconductor chip including a first face, wherein a first contact pad is arranged over the first face. The device further includes a second semiconductor chip including a first face, wherein a first contact pad is arranged over the first face, wherein the first semiconductor chip and the second semiconductor chip are arranged such that the first face of the first semiconductor chip faces in a first direction and the first face of the second semiconductor chip faces in a second direction opposite to the first direction. The first semiconductor chip is located laterally outside of an outline of the second semiconductor chip.

A method for forming a direct hybrid bond and a device resulting from a direct hybrid bond including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, capped by a conductive barrier, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads capped by a second conductive barrier, aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads capped by conductive barriers formed by contact bonding of the first non-metallic region to the second non-metallic region.

A device includes a first semiconductor chip including a first face, wherein a first contact pad is arranged over the first face. The device further includes a second semiconductor chip including a first face, wherein a first contact pad is arranged over the first face, wherein the first semiconductor chip and the second semiconductor chip are arranged such that the first face of the first semiconductor chip faces in a first direction and the first face of the second semiconductor chip faces in a second direction opposite to the first direction. The first semiconductor chip is located laterally outside of an outline of the second semiconductor chip.

Wafer bonding methods and wafer bonding structures are provided. An exemplary wafer bonding method includes providing a first wafer; forming a first interlayer dielectric layer and a first bonding layer passing through the first interlayer dielectric layer on the surface of the first wafer; providing a second wafer; forming a second interlayer dielectric layer and a second bonding layer passing through the second interlayer dielectric layer on surface of the second wafer; forming a self-assembling layer on at least one of a surface of the first interlayer dielectric layer and a surface of the second interlayer dielectric layer; and bonding the first wafer with the second wafer, the first bonding layer and the second bonding layer being fixed with each other, and the first interlayer dielectric layer and the second interlayer dielectric layer being fixed with each other by the self-assembling molecular layer.

A method for forming a direct hybrid bond and a device resulting from a direct hybrid bond including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, capped by a conductive barrier, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads capped by a second conductive barrier, aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads capped by conductive barriers formed by contact bonding of the first non-metallic region to the second non-metallic region.

A device includes a first semiconductor chip including a first face, wherein a first contact pad is arranged over the first face. The device further includes a second semiconductor chip including a first face, wherein a first contact pad is arranged over the first face, wherein the first semiconductor chip and the second semiconductor chip are arranged such that the first face of the first semiconductor chip faces in a first direction and the first face of the second semiconductor chip faces in a second direction opposite to the first direction. The first semiconductor chip is located laterally outside of an outline of the second semiconductor chip.

A method of forming a microelectronic device structure comprises coiling a portion of a wire up and around at least one sidewall of a structure protruding from a substrate. At least one interface between an upper region of the structure and an upper region of the coiled portion of the wire is welded to form a fused region between the structure and the wire.

A method of forming a microelectronic device structure comprises coiling a portion of a wire up and around at least one sidewall of a structure protruding from a substrate. At least one interface between an upper region of the structure and an upper region of the coiled portion of the wire is welded to form a fused region between the structure and the wire.