Patent classifications
H01L2224/802
Apparatus And Method For Verification Of Bonding Alignment
Presented herein is a device comprising a common node disposed in a first wafer a test node disposed in a first wafer and having a plurality of test pads exposed at a first surface of the first wafer. The test node also has test node lines connected to the test pads and that are separated by a first spacing and extend to a second surface of the first wafer. A comb is disposed in a second wafer and has a plurality of comb lines having a second spacing different from the first spacing. Each of the comb lines has a first surface exposed at a first side of the second wafer. The comb lines provide an indication of an alignment of the first wafer and second wafer by a number or arrangement of connections made by the plurality of comb lines between the test node lines and the common node.
Bonded processed semiconductor structures and carriers
Methods of fabricating semiconductor structures include implanting atom species into a carrier die or wafer to form a weakened region within the carrier die or wafer, and bonding the carrier die or wafer to a semiconductor structure. The semiconductor structure may be processed while using the carrier die or wafer to handle the semiconductor structure. The semiconductor structure may be bonded to another semiconductor structure, and the carrier die or wafer may be divided along the weakened region therein. Bonded semiconductor structures are fabricated using such methods.
Die Stacking with Integrated Thermal Treatment
Methods and apparatus for substrate processing are provided. In some embodiments, a substrate processing method includes: sequentially stacking a plurality of dies on a substrate into a stacked assembly; thermally treating the plurality of dies; and stacking at least one additional die atop the thermally treated plurality of dies.
METHOD FOR LOW TEMPERATURE BONDING OF SUBSTRATES
A method for low temperature bonding of substrates involves the following steps: A first substrate and a second substrate are provided; the first substrate and the second substrate are aligned; the first substrate and the second substrate are prebonded by a fusion prebonding process; and the first substrate and the second substrate are bonded by applying an electric voltage between the first substrate and the second substrate, wherein said voltage comprises a pulsed or AC component.