The present disclosure provides a semiconductor device, a method of manufacturing the semiconductor device and a mothed of method of manufacturing a semiconductor device assembly. The semiconductor device includes a substrate, a bonding dielectric disposed on the substrate, a first conductive feature disposed in the bonding dielectric, an air gap disposed in the bonding dielectric to separate a portion of a periphery of the first conductive feature from the bonding dielectric, and a second conductive feature including a base disposed in the bonding dielectric and a protrusion stacked on the base.

A semiconductor storage device according to an embodiment includes: an array chip having a memory cell array; a circuit chip having a circuit electrically connected to a memory cell; and a metal pad bonding the array chip and the circuit chip together. The metal pad includes an impurity. A concentration of the impurity is lowered as separating in a depth direction apart from a surface in a thickness direction of the metal pad.

Electrical connection between electrodes provided respectively at facing positions in joint surfaces of substrates to be joined by chip lamination technology is conducted more securely. A method of manufacturing a semiconductor device includes: a first step of embedding electrodes in insulating layers exposed to the joint surfaces of a first substrate and a second substrate; a second step of subjecting the joint surfaces of the first substrate and the second substrate to chemical mechanical polishing, to form the electrodes into recesses recessed as compared to the insulating layers; a third step of laminating insulating films of a uniform thickness over the entire joint surfaces; a fourth step of forming an opening by etching in at least part of the insulating films covering the electrodes of the first substrate and the second substrate; a fifth step of causing the corresponding electrodes to face each other and joining the joint surfaces of the first substrate and the second substrate to each other; and a sixth step of heating the first substrate and the second substrate joined to each other, causing the electrode material to expand and project through the openings, and joining the corresponding electrodes to each other.

A bonded assembly includes a first die containing first bonding pads having sidewalls that are laterally bonded to sidewalls of second bonding pads of a second die.

A first semiconductor die includes first bonding pads. The first bonding pads include proximal bonding pads embedded within a first bonding dielectric layer and distal bonding pads having at least part of the sidewall that overlies the first bonding dielectric layer. A second semiconductor die includes second bonding pads. The second bonding pads are bonded to the proximal bonding pads and the distal bonding pads. The proximal bonding pads are bonded to a respective one of a first subset of the second bonding pads at a respective horizontal bonding interface and the distal bonding pads are bonded to a respective one of a second subset of the second bonding pads at a respective vertical bonding interface at the same time. Dielectric isolation structures may vertically extend through the second bonding dielectric layer of the second semiconductor die and contact the first bonding dielectric layer.

A bonded assembly and a method of forming a bonded assembly includes providing a first semiconductor die including a first substrate, first semiconductor devices, and first bonding pads that are electrically connected to a respective node of the first semiconductor devices, providing a second semiconductor die including a second substrate, second semiconductor devices, and second bonding pads that are electrically connected to a respective node of the second semiconductor devices, forming a dielectric bonding pattern definition layer including bonding pattern definition openings therethrough over the second bonding pads, and bonding the second bonding pads to the first bonding pads, where the first metal pads expand through the bonding pattern definition openings and are bonded to a respective one of the second bonding pads.

The present technology relates to a semiconductor device in which a MIM capacitive element can be formed without any process damage, and a method for manufacturing the semiconductor device. In a semiconductor device, wiring layers of a first multilayer wiring layer formed on a first semiconductor substrate and a second multilayer wiring layer formed on a second semiconductor substrate are bonded to each other by wafer bonding. The semiconductor device includes a capacitive element including an upper electrode, a lower electrode, and a capacitive insulating film between the upper electrode and the lower electrode. One electrode of the upper electrode and the lower electrode is formed with a first conductive layer of the first multilayer wiring layer and a second conductive layer of the second multilayer wiring layer. The present technology can be applied to a semiconductor device or the like formed by joining two semiconductor substrates, for example.

A method for transferring a micro device is provided. The method includes: preparing a carrier substrate with the micro device thereon, wherein an adhesive layer is between and in contact with the carrier substrate and the micro device; picking up the micro-device from the carrier substrate by a transfer head; forming a liquid layer on a receiving substrate; and placing the micro device over the receiving substrate by the transfer head such that the micro device is in contact with the liquid layer and is gripped by a capillary force; and moving the transfer head away from the receiving substrate such that the micro device is detached from the transfer head and is stuck to the receiving substrate.

A method for transferring a micro device is provided. The method includes: preparing a carrier substrate with the micro device thereon, wherein an adhesive layer is between and in contact with the carrier substrate and the micro device; picking up the micro-device from the carrier substrate by a transfer head; forming a liquid layer on a receiving substrate; and placing the micro device over the receiving substrate by the transfer head such that the micro device is in contact with the liquid layer and is gripped by a capillary force; and moving the transfer head away from the receiving substrate such that the micro device is detached from the transfer head and is stuck to the receiving substrate.

A semiconductor die includes a first pad-level dielectric layer embedding first bonding pads and located over a first substrate. Each of the first bonding pads is located within a respective pad cavity in the first pad-level dielectric layer. Each of the first bonding pads includes a first metallic liner containing a first metallic liner material and contacting a sidewall of the respective pad cavity, a first metallic fill material portion embedded in the first metallic liner, and a metallic electromigration barrier layer contacting the first metallic fill material portion and adjoined to the first metallic liner.