In an embodiment, a device includes: a first die array including first integrated circuit dies, orientations of the first integrated circuit dies alternating along rows and columns of the first die array; a first dielectric layer surrounding the first integrated circuit dies, surfaces of the first dielectric layer and the first integrated circuit dies being planar; a second die array including second integrated circuit dies on the first dielectric layer and the first integrated circuit dies, orientations of the second integrated circuit dies alternating along rows and columns of the second die array, front sides of the second integrated circuit dies being bonded to front sides of the first integrated circuit dies by metal-to-metal bonds and by dielectric-to-dielectric bonds; and a second dielectric layer surrounding the second integrated circuit dies, surfaces of the second dielectric layer and the second integrated circuit dies being planar.

There is provided a bonding apparatus for bonding substrates together, which includes: a first holding part configured to adsorptively hold a first substrate by vacuum-drawing the first substrate on a lower surface of the first substrate; a second holding part provided below the first holding part and configured to adsorptively hold a second substrate by vacuum-drawing the second substrate on an upper surface of the second substrate; a pressing member provided in the first holding part and configured to press a central portion of the first substrate; and a plurality of substrate detection parts provided in the first holding part and configured to detect a detachment of the first substrate from the first holding part.

Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a method for forming a semiconductor device is disclosed. A first device layer is formed on a first substrate. A first bonding layer including a first bonding contact and a first bonding alignment mark is formed above the first device layer. A second device layer is formed on a second substrate. A second bonding layer including a second bonding contact and a second bonding alignment mark is formed above the second device layer. The first bonding alignment mark is aligned with the second bonding alignment mark, such that the first bonding contact is aligned with the second bonding contact. The first substrate and the second substrate are bonded in a face-to-face manner, so that the first bonding contact is in contact with the second bonding contact at a bonding interface, and the first bonding alignment mark is in contact with the second bonding alignment mark at the bonding interface.

A substrate bonding method and apparatus are described. The substrate bonding apparatus is used to bond a first substrate to a second substrate. The bonding apparatus includes a first bonding chuck configured to hold the first substrate on a first surface of the first bonding chuck; a second bonding chuck configured to hold the second substrate on a second surface of the second bonding chuck, the second surface facing the first surface of the first bonding chuck; a seal arranged between the first bonding chuck and the second bonding chuck and adjacent to at least one edge of the first substrate and at least one edge of the second substrate; and a process gas supply device configured to supply a process gas to a bonding space surrounded by the seal.

A semiconductor storage device includes first and second chips. The first chip includes memory cells provided on a first substrate in a memory cell region, a plurality of first pads provided on a first surface of the first substrate and disposed in an edge region of the first chip that surrounds the memory cell region, and a first conductive layer provided on the first substrate and electrically connected to the first pads. The second chip includes a first circuit provided on a second substrate in a circuit region, a plurality of second pads provided on the second substrate and disposed in an edge region of the second chip that surrounds the circuit region, and a second conductive layer provided on the second substrate and electrically connected to the second pads. The first pads of the first chip and the second pads of the second chip are bonded facing each other.

A semiconductor die includes first pads, switches that are electrically connected with the first pads, respectively, a test signal generator that generates test signals and to transmit the test signals to the switches, internal circuits that receive first signals through the first pads and the switches, to perform operations based on the first signals, and to output second signals through the switches and the first pads based on a result of the operations, and a switch controller that controls the switches so that the first pads communicate with the test signal generator during a test operation and that the first pads communicate with the internal circuits after a completion of the test operation.

A method and an apparatus for determining expansion compensation in a photoetching process, and a method for manufacturing a semiconductor device are provided. A relative vector misalignment value of a first wafer and a second wafer after being bonded is obtained based on a relative position relationship between a first alignment pattern of the first wafer and a second alignment pattern of the second wafer in a boding structure. A relative expansion value of the first wafer and the second wafer is obtained based on the relative vector misalignment value. A developing expansion compensation value in the photoetching process is obtained. The expansion compensation value is used to the photoetching process of a first conductor layer including the first alignment pattern of the first wafer and/or a second conductor layer including the second alignment pattern of the second wafer.

In a wafer to wafer bonding method, a first wafer is vacuum suctions on a first surface of a lower stage and a second wafer is vacuum suctioned on a second surface of an upper stage. Pressure is applied to a middle portion of the first wafer by a lower push rod and pressure is applied to a middle portion of the second wafer by an upper push rod. Bonding of the first and second wafers propagates radially outwards. A bonding propagation position of the first and second wafers is detected. A ratio of protruding lengths of the lower push rod and the upper push rod is changed according to the bonding propagation position.

A method is provided and includes the following steps. A first wafer is coupled to a first support of a bonding tool and a second wafer is coupled to a second support of the bonding tool. The second wafer is bonded to the first wafer with the first wafer coupled to the first support. Whether a bubble is between the bonded first and second wafers in the bonding tool is detected.

A first workpiece includes first active pads, a first test pad, and a second test pad on a primary surface of the first workpiece, the first test pad electrically connected to the second test pad. A second workpiece includes second active pads, a third test pad, and a fourth test pad on a primary surface of the second workpiece. The first and second workpieces are bonded along an interface between the primary surface of the first workpiece and the primary surface of the second workpiece to bond the first active pads with the second active pads, bond the first test pad with the third test pad, and bond the second test pad with the fourth test pad. Connectivity detection circuits test electrical connectivity between the third test pad and the fourth test pad