H01L2224/81007

Mixed-orientation multi-die integrated circuit package with at least one vertically-mounted die

A mixed-orientation multi-die (“MOMD”) integrated circuit package includes dies mounted in different physical orientations. An MOMD package includes both (a) one or more dies horizontally-mounted dies (HMDs) mounted horizontally to a horizontally-extending die mount base and (b) one or more vertically-mounted dies (VMDs) mounted vertically to the horizontally-extending die mount base. HMDs may include FPGAs or other high performance chips, while VMDs may include low performance chips and other physical structures such as heat dissipators, memory, high voltage/analog devices, sensors, or MEMS, for example. The die mount base of an MOMD package may include structures for aligning and mounting VMD(s), for example, VMD slots for receiving each mounted VMD, and VMD alignment structures that facilitate aligning and/or guiding a vertical mounting of each VMD to the die mount base. MOMD packages may provide a reduced lateral footprint and increased die integration per unit area, as compared with conventional multi-die packages.

HIGH BANDWIDTH MODULE

A module includes a substrate having a plurality of contact regions, and a spacer-chip assembly. The spacer-chip assembly in turn includes at least first and second semiconductor dies, each having a plurality of electrical interconnect pillars and a plurality of contact pads, and a spacer wafer. The at least first and second semiconductor dies are secured to the spacer wafer, and the spacer wafer includes at least first and second semiconductor circuit features coupled to a first portion of the contact pads of the at least first and second semiconductor dies. The spacer wafer includes wiring electrically coupling the at least first and second semiconductor dies via a second portion of the contact pads. The spacer wafer has a plurality of holes formed therethrough. The plurality of electrical interconnect pillars extend through the holes and are secured to the contact regions on the substrate.

Light-emitting structure alignment preservation in display fabrication
10998480 · 2021-05-04 · ·

Techniques are disclosed for forming a frame on the backplane comprising structures at least partially circumscribing or enclosing metal contacts on the backplane. In some embodiments, the frame may comprise a photoresist. The dimensions and structural integrity of the frame can help prevent misalignment and/or damage of physical obtrusions of light-emitting structures during a bonding process of the light-emitting structures to the backplane.

Electronic Device and Method for Manufacturing an Electronic Device
20210139317 · 2021-05-13 ·

In an embodiment an electronic device includes a carrier board having an upper surface, an electronic chip mounted on the upper surface of the carrier board, the electronic chip having a mounting side facing the upper surface of the carrier board, a flexible mounting layer arranged between the upper surface of the carrier board and the mounting side of the electronic chip, the flexible mounting layer mounting the electronic chip to the carrier board, wherein the mounting side has at least one first region and a second region, and wherein the electronic chip has at least one chip contact element in the first region and at least one connection element arranged on the at least one first region and connecting the at least one chip contact element to the upper surface of the carrier board, wherein the flexible mounting layer separates the second region from the connection element.

INTERPOSER BOARD HAVING HEATING FUNCTION AND ELECTRONIC DEVICE USING THE SAME
20210134695 · 2021-05-06 ·

A non-conductive film having heating function and an electronic device using the same are provided. The electronic device includes a circuit substrate, an interposer board disposed on the circuit substrate, at least one electronic chip carried by the interposer board, a first non-conductive film disposed between the interposer board and the circuit substrate, and a second non-conductive film disposed between the at least one electronic chip and the interposer board, the at least one electronic chip being electrically connected to the circuit substrate through the interposer board. One of the first non-conductive film and the second non-conductive film is a type of non-conductive film having heating function, and the non-conductive film with heating function includes a non-conductive body and a plurality of micro heaters. The shape of the non-conductive body is changeable by heating, and the micro heaters are disposed on or in the non-conductive body.

SYSTEM AND METHOD FOR LASER ASSISTED BONDING OF AN ELECTRONIC DEVICE

A system and method for laser assisted bonding of semiconductor die. As non-limiting examples, various aspects of this disclosure provide systems and methods that enhance or control laser irradiation of a semiconductor die, for example spatially and/or temporally, to improve bonding of the semiconductor die to a substrate.

METHOD OF FORMING AN ELECTRONIC DEVICE STRUCTURE HAVING AN ELECTRONIC COMPONENT WITH AN ON-EDGE ORIENTATION AND RELATED STRUCTURES

A method of forming an electronic device structure includes providing an electronic component having a first major surface, an opposing second major surface, a first edge surface, and an opposing second edge surface. A substrate having a substrate first major surface and an opposing substrate second major surface is provided. The second major surface of the first electronic component is placed proximate to the substrate first major surface and providing a conductive material adjacent the first edge surface of the first electronic component. The conductive material is exposed to an elevated temperature to reflow the conductive material to raise the first electronic component into an upright position such that the second edge surface is spaced further away from the substrate first major surface than the first edge surface. The method is suitable for providing electronic components, such as antenna, sensors, or optical devices in a vertical or on-edge.

LIGHT-EMITTING ASSEMBLY
20210066262 · 2021-03-04 ·

A light emitting assembly includes a substrate, an adhesive layer on the substrate, and a plurality of light emitting units on the adhesive layer. Each of the light emitting units includes a first-type semiconductor layer, a second-type semiconductor layer, an active layer disposed between the first-type and second-type semiconductor layers, a first electrode electrically connected to the first-type semiconductor layer, and a second electrode electrically connected to the second-type semiconductor layer. A light emitting apparatus including the light emitting assembly is provided. Methods for making the light emitting assembly and the light emitting apparatus are provided.

3DI solder cup
10964654 · 2021-03-30 · ·

A substrate or semiconductor device, semiconductor device assembly, and method of forming a semiconductor device assembly that includes a barrier on a solder cup. The semiconductor device assembly includes a substrate disposed over another substrate. At least one solder cup extends from one substrate towards an under bump metal (UBM) on the other substrate. The barrier on the exterior of the solder cup may be a standoff to control a bond line between the substrates. The barrier may reduce solder bridging during the formation of a semiconductor device assembly. The barrier may help to align the solder cup with a UBM when forming a semiconductor device assembly and may reduce misalignment due to lateral movement of substrates and/or semiconductor devices.

FILM STRUCTURE, CHIP CARRIER ASSEMBLY AND CHIP CARRIER DEVICE
20210043552 · 2021-02-11 ·

A film structure, a chip carrier assembly, and a chip carrier device are provided. The film structure includes a film and a plurality of micro-heaters. In which, the film is applied on a substrate, and the plurality of micro-heaters is disposed on top of the film or in the film. The chip carrier assembly includes a circuit substrate and the film structure. In which, the circuit substrate carries a plurality of chips. The chip carrier device includes the chip carrier assembly and a suction unit. In which, the suction unit is arranged above the chip carrier assembly to attach on and transfer the plurality of chips to the circuit substrate. The chips are disposed on the circuit substrate through solder balls, and the micro-heaters heat the solder balls that are in contact with the chips.