A semiconductor package includes a semiconductor chip and a redistribution layer structure. The redistribution layer structure is arranged to form an antenna transmitter structure and an antenna receiver structure over the semiconductor chip, wherein patterns of the antenna receiver structure are located at different levels of the redistribution layer structure, and at least one pattern of the antenna transmitter structure is at the same level of the topmost patterns of the antenna receiver structure.

A semiconductor device includes an encapsulant including a first hollow region, a sensing die in the first hollow region of the encapsulant, and a redistribution structure disposed on the encapsulant and the sensing die and electrically coupled to the sensing die. A top width of the hollow region is greater than a bottom width of the hollow region. The redistribution structure includes a second hollow region which exposes a sensing area of the sensing die, and the redistribution structure is slanted downward from an edge of the device toward the sensing area.

An electrical conductor structure comprises a substrate and an electrical conductor disposed on or in the substrate. The electrical conductor comprises a first layer and a second layer disposed on a side of the first layer opposite the substrate. The first layer comprises a first electrical conductor that forms a non-conductive layer on a surface of the first electrical conductor when exposed to air and the second layer comprising a second electrical conductor that does not form a non-conductive layer on a surface of the second electrical conductor when exposed to air. A component comprises a connection post that is electrically connected to the second layer and the electrical conductor. The first and second layers can be inorganic. The first layer can comprise a metal such as aluminum and the second layer can comprise an electrically conductive metal oxide such as indium tin oxide.

A semiconductor package includes a molding compound, a chip and a conductive pad, wherein the chip is electrically connected to the conductive pad and both are encapsulated in the molding compound. An anchor flange is formed around a top surface of the conductive pad by over plating. When the conductive pad is embedded in the molding compound, the anchor flange engages the molding compound to prevent the conductive pad from separation. Bottoms of a chip and the conductive pad are exposed from the molding compound for electrically soldering to a circuit board.

A packaging structure and a formation method thereof are provided. The packaging structure includes a carrier board, and a plurality of semiconductor chips adhered to the carrier board. Each semiconductor chip has a functional surface and a non-functional surface opposite to the functional surface, and a plurality of pads are formed on the functional surface of a semiconductor chip of the plurality of chips. A metal bump is formed on a surface of a pad of the plurality of pads, and a first encapsulation layer is formed on the functional surface. The packaging structure also includes a second encapsulation layer formed over the carrier board.

A method and apparatus for transferring components. A first substrate is provided with the components. A second substrate is provided with an adhesive layer comprising a hot melt adhesive material. The components on the first substrate are contacted with the adhesive layer on the second substrate while the adhesive layer is melted. The adhesive layer is allowed to solidify to form an adhesive connection between the components and the second substrate. The first and second substrates are moved apart to transfer the components. At least a subset of the components is transferred from the second substrate to a third substrate by radiating light onto the adhesive layer to form a jet of melted material carrying the components.

A method and apparatus for transferring components. A first substrate is provided with the components. A second substrate is provided with an adhesive layer comprising a hot melt adhesive material. The components on the first substrate are contacted with the adhesive layer on the second substrate while the adhesive layer is melted. The adhesive layer is allowed to solidify to form an adhesive connection between the components and the second substrate. The first and second substrates are moved apart to transfer the components. At least a subset of the components is transferred from the second substrate to a third substrate by radiating light onto the adhesive layer to form a jet of melted material carrying the components.

A semiconductor package includes a semiconductor die including a sensing component, an encapsulant laterally covering the semiconductor die, a through insulator via (TIV) and a dummy TIV penetrating through the encapsulant, a patterned dielectric layer disposed on the top surfaces of the encapsulant and the semiconductor die, a conductive pattern disposed on and inserted into the patterned dielectric layer to be in contact with the TIV and the semiconductor die, and a first dummy conductive pattern disposed on the patterned dielectric layer and connected to the dummy TIV. The top surface of the encapsulant is above and rougher than a top surface of the semiconductor die, and the sensing component is accessibly exposed by the patterned dielectric layer.

A package includes a die and a redistribution layer. A top surface of the die has a first area and a second area connected with the first area. The redistribution layer structure includes a first insulation layer, a redistribution layer, and a second insulation layer. The first insulation layer is overlapping with the second area. The redistribution layer is disposed above the die. The second insulation layer is disposed above the redistribution layer and overlapping with the second area and the first area. The second insulation layer covers a top surface of the first insulation layer and is in contact with a side surface of the first insulation layer and the top surface of the die.

An example of a printable electronic component includes a component substrate having a connection post side and an opposing contact pad side. The component can include one or more non-planar, electrically conductive connection posts protruding from the connection post side of the component substrate. Each of the one or more connection posts can have a peak area smaller than a base area. The component can include one or more non-planar, electrically conductive exposed component contact pads disposed on (e.g., directly on, indirectly on, or in) the contact pad side of the component substrate. Multiple components can be stacked such that connection post(s) of one are in contact with non-planar contact(s) of one or more others.