The present invention provides a semiconductor package and a method of fabricating the same, including: placing in a groove of a carrier a semiconductor element having opposing active and non-active surfaces, and side surfaces abutting the active surface and the non-active surface; applying an adhesive material in the groove and around a periphery of the side surfaces of the semiconductor element; forming a dielectric layer on the adhesive material and the active surface of the semiconductor element; forming on the dielectric layer a circuit layer electrically connected to the semiconductor element; and removing a first portion of the carrier below the groove to keep a second portion of the carrier on a side wall of the groove intact for the second portion to function as a supporting member. The present invention does not require formation of a silicon interposer, and therefore the overall cost of a final product is much reduced.

A semiconductor device is made by forming solder bumps over a copper carrier. Solder capture indentations are formed in the copper carrier to receive the solder bumps. A semiconductor die is mounted to the copper carrier using a die attach adhesive. The semiconductor die has contact pads formed over its active surface. An encapsulant is deposited over the copper carrier, solder bumps, and semiconductor die. A portion of the encapsulant is removed to expose the solder bumps and contact pads. A conductive layer is formed over the encapsulant to connect the solder bumps and contact pads. The conductive layer operates as a redistribution layer to route electrical signals from the solder bumps to the contact pads. The copper carrier is removed. An insulating layer is formed over the conductive layer and encapsulant. A plurality of semiconductor devices can be stacked and electrically connected through the solder bumps.

An optoelectronic component contains a semiconductor chip (1) and a carrier body (10), which are provided with a transparent, electrically insulating encapsulation layer (3), the encapsulation layer (3) having two cutouts (11, 12) for uncovering a contact area (6) and a connection region (8) of the carrier body, and an electrically conductive layer (14) being led from the contact area (6) over a partial region of the encapsulation layer (3) to the electrical connection region (8) of the carrier body (10) in order to electrically connect the contact area (6) and the electrical connection region (8) to one another. The radiation emitted in a main radiation direction (13) by the semiconductor chip (1) is coupled out through the encapsulation layer (3), which advantageously contains luminescence conversion substances for the wavelength conversion of the emitted radiation.

A display device includes a conductive pattern on a substrate, a via layer on the conductive pattern with a via hole exposing the conductive pattern, a first electrode and a second electrode on the via layer and spaced apart from each other, a first insulating layer on the first electrode and the second electrode, a bank layer on the first insulating layer defining an emission area and a subarea, a light-emitting element on the first insulating layer, and a first connection electrode and a second connection electrode on the first insulating layer and the light-emitting element. The first connection electrode electrically contacts an end of the light-emitting element, and the second connection electrode electrically contacts another end of the light-emitting element. The bank layer includes a bank extension portion extended to the subarea and the bank extension portion overlaps at least a portion of the via hole.

A display device includes a first electrode and a second electrode disposed on a substrate and spaced apart from each other, a light emitting element on the substrate and having a first end and a second end, a third electrode disposed on the light emitting element, and electrically connecting the first electrode with the first end of the light emitting element, an insulating pattern disposed on the third electrode and exposing the second end of the light emitting element, and a fourth electrode on the substrate, and electrically connecting the second electrode with the second end of the light emitting element. A void may be formed between the light emitting element and the insulating pattern.

A display device includes a conductive pattern on a substrate, a via layer on the conductive pattern with a via hole exposing the conductive pattern, a first electrode and a second electrode on the via layer and spaced apart from each other, a first insulating layer on the first electrode and the second electrode, a bank layer on the first insulating layer defining an emission area and a subarea, a light-emitting element on the first insulating layer, and a first connection electrode and a second connection electrode on the first insulating layer and the light-emitting element. The first connection electrode electrically contacts an end of the light-emitting element, and the second connection electrode electrically contacts another end of the light-emitting element. The bank layer includes a bank extension portion extended to the subarea and the bank extension portion overlaps at least a portion of the via hole.

A display panel includes a circuit substrate, pixel structures and a molding layer. The circuit substrate has first pad structures and second pad structures. The pixel structures are disposed above a display region of the circuit substrate. Each of at least a portion of the pixel structures includes a first light emitting diode, a first conductive block, and a first conductive connection structure. The first light emitting diode is disposed on a corresponding first pad structure. The first conductive block is disposed on a corresponding second pad structure. The first conductive connection structure electrically connects the first light emitting diode to the first conductive block. The molding layer is located above the circuit substrate and surrounds the first light emitting diode and the first conductive block. The first conductive connection structure is located on the molding layer.

A display device includes a first electrode and a second electrode disposed on a substrate and spaced apart from each other, a light emitting element on the substrate and having a first end and a second end, a third electrode disposed on the light emitting element, and electrically connecting the first electrode with the first end of the light emitting element, an insulating pattern disposed on the third electrode and exposing the second end of the light emitting element, and a fourth electrode on the substrate, and electrically connecting the second electrode with the second end of the light emitting element. A void may be formed between the light emitting element and the insulating pattern.

Package structures and methods of forming package structures are discussed. A package structure, in accordance with some embodiments, includes a large package component, such as a CoWoS, adhered to a large package substrate, such as a printed circuit board, an underfill material disposed between the large package component and the large package substrate, and a stress-release structure with high elongation values formed from photolithography encapsulated by the underfill material. The stress-release structure helping to reduce stress in the underfill material to reduce the risk of underfill cracking caused by the difference in coefficients of thermal expansion between the large package component and the large package substrate.