Patent classifications
H01L2224/84007
Semiconductor package structure
A semiconductor package structure is provided. The semiconductor package structure includes a semiconductor chip, a guard ring, a gel layer, and a first lead frame. The guard ring is disposed on the semiconductor chip, and the gel layer is disposed on the guard ring. The first lead frame is electrically connected to the semiconductor chip, and the gel layer is located between the guard ring and the first lead frame.
Multi-Clip Structure for Die Bonding
A multi-clip structure includes a first clip for die bonding and a second clip for die bonding. The multi-clip structure further includes a retaining tape fixed to the first clip and to the second clip to hold the first clip and the second clip together.
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
A method includes providing a substrate having substrate terminals and providing a first component having a first terminal and a second terminal. The method includes providing a clip structure having a first clip, a second clip, and a clip connector coupling the first clip to the second clip. The method includes coupling the first clip to the first terminal and a substrate terminal and coupling the second clip to another substrate terminal. The method includes encapsulating the structure and removing a portion of the clip connector. In some examples, the first portion of the clip connector includes a first portion surface, the second portion of the clip connector includes a second portion surface, and the first portion surface and the second portion surface are exposed from a top side of the encapsulant. Other examples and related structures are also disclosed herein.
Semiconductor device
The semiconductor device includes a semiconductor element, and an electro-conductive first plate-like part electrically connected to a top-face-side electrode of the semiconductor element and including a first joint part projecting from a side face, and an electro-conductive second plate-like part including a second joint part projecting from a side face. A bottom face of the first joint part and a top face of the second joint part face one another, and are electrically connected via an electro-conductive bonding material. A bonding-material-thickness ensuring means is provided in a zone where the bottom face of the first joint part and the top face of the second joint part face one another to ensure a thickness of the electro-conductive bonding material between an upper portion of a front end of the second joint part and the bottom face of the first joint part.
SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME, AND POWER CONVERSION DEVICE
Provided is a semiconductor device having a structure of directly bonding a lead electrode to a semiconductor element through a bonding layer, in which whether the bonding layer has a predetermined thickness can be checked through a visual inspection. The semiconductor device includes: a semiconductor element mounted on an insulating substrate or a lead frame; a bonding layer on the semiconductor element; and a lead electrode including a main body plate electrically connected to an external electrode, and a cantilevered plate having one end being connected to the main body plate as a connection part, and being cut from the main body plate, wherein the cantilevered plate is bent in a direction of the semiconductor element with respect to the main body plate, and has an other end embedded in the bonding layer, and the bonding layer covers at least a part of an upper surface of the cantilevered plate.
SEMICONDUCTOR PACKAGE STRUCTURE
A semiconductor package structure is provided. The semiconductor package structure includes a semiconductor chip, a guard ring, a gel layer, and a first lead frame. The guard ring is disposed on the semiconductor chip, and the gel layer is disposed on the guard ring. The first lead frame is electrically connected to the semiconductor chip, and the gel layer is located between the guard ring and the first lead frame.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
The object is to provide a technology for enabling reduction of adhesion of a bonding material to a particular electrode. A semiconductor device includes: a semiconductor element with a surface including a first electrode and a second electrode; a protective film formed on the surface of the semiconductor element and having insulating properties, the protective film exposing the first electrode and the second electrode; a metal lead electrode bonded to the first electrode exposed from the protective film; and a bonding material with which the first electrode exposed from the protective film is bonded to the metal lead electrode. The metal lead electrode includes an abutment portion being a protrusion abutting the protective film and blocking between the bonding material and the second electrode in a cross-sectional view.
METHOD FOR ELECTRICALLY CONTACTING A COMPONENT BY GALVANIC CONNECTION OF AN OPEN-PORED CONTACT PIECE, AND CORRESPONDING COMPONENT MODULE
The invention relates to a method for electrically contacting a component (10) (for example a power component and/or a (semiconductor) component having at least one transistor, preferably an IGBT (insulated-gate bipolar transistor)) having at least one contact (40, 50), at least one open-pored contact piece (60, 70) is galvanically (electrochemically or free of external current) connected to at least one contact (40, 50). In this way, a component module is achieved. The contact (40, 50) is preferably a flat part or has a contact surface, the largest planar extent thereof being greater than an extension of the contact (40, 50) perpendicular to said contact surface. The temperature of the galvanic connection is at most 100 C., preferably at most 60 C., advantageously at most 20 C. and ideally at most 5 C. and/or deviates from the operating temperature of the component by at most 50 C., preferably by at most 20 C., in particular by at most 10 C. and ideally by at most 5 C., preferably by at most 2 C. The component (10) can be contacted by means of the contact piece (60, 70) with a further component, a current conductor and/or a substrate (90). Preferably, a component (10) having two contacts (40, 50) on opposite sides of the component (10) is used, wherein at least one open-pored contact piece (60, 70) is galvanically connected to each contact (40, 50).
Coated electrical assembly
The present invention relates to an electrical assembly which has a conformal coating, wherein said conformal coating is obtainable by a method which comprises: (a) plasma polymerization of a compound of formula (I) and a fluorohydrocarbon, wherein the molar ratio of the compound of formula (I) to the fluorohydrocarbon is from 5:95 to 50:50, and deposition of the resulting polymer onto at least one surface of the electrical assembly: wherein: R.sub.1 represents C.sub.1-C.sub.3 alkyl or C.sub.2-C.sub.3 alkenyl; R.sub.2 represents hydrogen, C.sub.1-C.sub.3 alkyl or C.sub.2-C.sub.3 alkenyl; R.sub.3 represents hydrogen, C.sub.1-C.sub.3 alkyl or C.sub.2-C.sub.3 alkenyl; R.sub.4 represents hydrogen, C.sub.1-C.sub.3 alkyl or C.sub.2-C.sub.3 alkenyl; R.sub.5 represents hydrogen, C.sub.1-C.sub.3 alkyl or C.sub.2-C.sub.3 alkenyl; and R.sub.6 represents hydrogen, C.sub.1-C.sub.3 alkyl or C.sub.2-C.sub.3 alkenyl, and (b) plasma polymerization of a compound of formula (I) and deposition of the resulting polymer onto the polymer formed in step (a). ##STR00001##
SEMICONDUCTOR PACKAGE STRUCTURE
A semiconductor package structure is provided. The semiconductor package structure includes a semiconductor chip, a guard ring, a gel layer, and a first lead frame. The guard ring is disposed on the semiconductor chip, and the gel layer is disposed on the guard ring. The first lead frame is electrically connected to the semiconductor chip, and the gel layer is located between the guard ring and the first lead frame.