A semiconductor package including a base chip; a semiconductor chip having a lower surface on which connection pads are disposed, the semiconductor chip being mounted on an upper surface of the base chip; a plurality of bumps on the connection pads and electrically connecting the base chip to the semiconductor chip; an adhesive film between the base chip and the semiconductor chip and fixing the semiconductor chip to the base chip; and an encapsulant on the base chip and encapsulating the semiconductor chip, wherein the semiconductor chip includes a central portion spaced apart from the upper surface of the base chip by a first distance, and an edge portion spaced apart from the upper surface of the base chip by a second distance, the edge portion being outside of the central portion, and a ratio of the second distance to the first distance is about 0.8 to about 1.0.

Discussed is an assembly substrate used in a display manufacturing method for placing semiconductor light-emitting devices to predetermined positions thereof using an electric field and a magnetic field, the assembly substrate including a base part; a plurality of assembly electrodes extending in one direction and disposed in parallel on the base part; a dielectric layer disposed on the base part to cover the plurality of assembly electrodes; and partition walls disposed on the dielectric layer and defining cells at predetermined intervals along the one direction of the plurality of assembly electrodes so as to overlap portions of the plurality of assembly electrodes, and the semiconductor light-emitting devices being placed into the cells, respectively, wherein a protrusion part protrudes inward from at least one of inner surfaces of each of the cells.

A stretchable display module and a manufacturing method thereof are provided. The stretchable display module includes a display layer including a plurality of display islands arranged and spaced apart from each other, wherein two of the adjacent display islands are electrically connected by a connecting wire; a transparent adhesive layer including a filling adhesive layer filled in a spacing region between the display islands, a first adhesive layer disposed on a surface of the display layer opposite an emitting direction of the display layer, and a second adhesive layer disposed on a surface of the display layer in the emitting direction.

A semiconductor package and a method of forming the same are provided. The semiconductor package includes a package substrate, a semiconductor device, an underfill element, and a groove. The semiconductor device is bonded to the surface of the package substrate through multiple electrical connectors. The underfill element is formed between the semiconductor device and the surface of the package substrate to surround and protect the electrical connectors. The underfill element includes a fillet portion that extends laterally beyond the periphery of the semiconductor device and is formed along the periphery of the semiconductor device. The groove is formed in the fillet portion and spaced apart from the periphery of the semiconductor device.

The present disclosure relates to a radio frequency device that includes a device region with a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion, first bump structures, a first mold compound, and a second mold compound. The FEOL portion includes an active layer, a contact layer, and isolation sections. Herein, the active layer and the isolation sections reside over the contact layer, and the active layer is surrounded by the isolation sections. The BEOL portion is formed underneath the FEOL portion, and the first bump structures and the first mold compound are formed underneath the BEOL portion. Each first bump structure is partially encapsulated by the first mold compound, and electrically coupled to the FEOL portion via connecting layers within the BEOL portion. The second mold compound resides over the active layer without a silicon material, which has a resistivity between 5 Ohm-cm and 30000 Ohm-cm, in between.

A semiconductor package and manufacturing method is disclosed. The semiconductor package includes a semiconductor chip having a plurality of chip terminals formed on one surface thereof, a redistribution layer electrically connected to the chip terminal and extending outwardly from a side surface of the chip to electrically connect the chip terminal to an external device, an external pad provided on the insulating layer, formed to be in contact with the redistribution layer exposed from the insulating layer to be electrically connected to the redistribution layer, and exposed to an upper side of the insulating layer; an external connection terminal formed on the external pad and contacting an external device, a protective layer formed to surround at least one surface and a side surface of the chip, and an insulating layer formed to cover the redistribution layer.

Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a package substrate having a first surface and an opposing second surface; a first die having a first surface and an opposing second surface embedded in a first dielectric layer, where the first surface of the first die is coupled to the second surface of the package substrate by first interconnects; a second die having a first surface and an opposing second surface embedded in a second dielectric layer, where the first surface of the second die is coupled to the second surface of the first die by second interconnects; and a third die having a first surface and an opposing second surface embedded in a third dielectric layer, where the first surface of the third die is coupled to the second surface of the second die by third interconnects.

The present disclosure provides a package device including a conductive pad, a protecting block, and a redistribution layer. The protecting block is disposed on the conductive pad. The redistribution layer is disposed on the protecting block, and the conductive pad is electrically connected to the redistribution layer through the protecting block.

Discussed is an assembly board including: a base portion; a plurality of assembly electrodes extending in one direction and disposed on the base portion at predetermined intervals; a dielectric layer stacked on the base portion to cover the plurality of assembly electrodes; and barrier ribs stacked on the dielectric layer and defining cells in which semiconductor light emitting diodes are seated at the predetermined intervals along an extending direction of the plurality of assembly electrodes so as to overlap a portion of the plurality of assembly electrodes, wherein the plurality of assembly electrodes include first electrodes and second electrodes disposed on different planes on the base portion, and wherein the first electrodes are disposed on one surface of the base portion, and the second electrodes are disposed on one surface of the dielectric layer.

Discussed in an assembly substrate used in a display manufacturing method for placing semiconductor light-emitting devices to predetermined positions thereof using an electric field and a magnetic field, the assembly substrate including: a base part; a plurality of pair electrodes extending in one direction and disposed in parallel on the base part; a dielectric layer disposed on the base part to cover the plurality of pair electrodes; and partition walls disposed on the dielectric layer and defining cells at predetermined intervals along the one direction of the plurality of pair electrodes so as to overlap portions of the plurality of pair electrodes, and the semiconductor light-emitting devices being placed into the cells, respectively, wherein at least one of a recess portion and a concave and convex portion is formed on an upper surface of each of the partition walls.