An anisotropic conductive film composition, an anisotropic conductive film prepared using the same, and a connection structure using the same, the anisotropic conductive film including a binder resin; a curable alicyclic epoxy compound; a curable oxetane compound; a quaternary ammonium catalyst; and conductive particles, wherein the anisotropic conductive film has a heat quantity variation rate of about 15% or less, as measured by differential scanning calorimetry (DSC) and calculated by Equation 1:

Heat quantity variation rate (%)=[(H.sub.0H.sub.1)/H.sub.0]100Equation 1 wherein H.sub.0 is a DSC heat quantity of the anisotropic conductive film, as measured at 25 C. and a time point of 0 hr, and H.sub.1 is a DSC heat quantity of the anisotropic conductive film, as measured after being left at 40 C. for 24 hours.

An underfill composition for encapsulating a bond line and a method of using the underfill composition are described. Advantageously, the disclosed underfill composition in an uncured state has a fluidity value of less than about ten minutes over about a two centimeter distance at a temperature of about 90 degrees C. and at a bond line thickness of about 50 microns or less and still have a bulk thermal conductivity that is greater than about 0.8 W/mK in the cured state.

An underfill composition for encapsulating a bond line and a method of using the underfill composition are described. Advantageously, the disclosed underfill composition in an uncured state has a fluidity value of less than about ten minutes over about a two centimeter distance at a temperature of about 90 degrees C. and at a bond line thickness of about 50 microns or less and still have a bulk thermal conductivity that is greater than about 0.8 W/mK in the cured state.

Techniques are provided for hybrid bonding metallic bonding pads embedded in high-K dielectric material to form a high capacitance device. For example, a device comprises a first semiconductor structure bonded to a second semiconductor structure, and a plurality of metal pads at an interface portion between the first semiconductor structure and the second semiconductor structure. The plurality of metal pads are disposed in a high-K dielectric layer. The plurality of metal pads and the high-K dielectric layer comprise at least one capacitor.

A bonding method can include polishing a first bonding layer of a first element for direct bonding, the first bonding layer comprises a first conductive pad and a first non-conductive bonding region. After the polishing, a last chemical treatment can be performed on the polished first bonding layer. After performing the last chemical treatment, the first bonding layer of the first element can be directly bonded to a second bonding layer of a second element without an intervening adhesive, including directly bonding the first conductive pad to a second conductive pad of the second bonding layer and directly bonding the first non-conductive bonding region to a second nonconductive bonding region of the second bonding layer. No treatment or rinse is performed on the first bonding layer between performing the last chemical treatment and directly bonding.

A bonding method can include polishing a first bonding layer of a first element for direct bonding, the first bonding layer comprises a first conductive pad and a first non-conductive bonding region. After the polishing, a last chemical treatment can be performed on the polished first bonding layer. After performing the last chemical treatment, the first bonding layer of the first element can be directly bonded to a second bonding layer of a second element without an intervening adhesive, including directly bonding the first conductive pad to a second conductive pad of the second bonding layer and directly bonding the first non-conductive bonding region to a second nonconductive bonding region of the second bonding layer. No treatment or rinse is performed on the first bonding layer between performing the last chemical treatment and directly bonding.

The present disclosure relates to semiconductor structures and, more particularly, to a stacked high-power radio frequency (RF) switch and methods of manufacture. The structure includes: a top substrate having at least one top transistor and metal wiring structures; and a bottom substrate having at least one bottom transistor and metal wiring structure. The bottom substrate is attached to the top substrate with the at least one top transistor being electrically connected to the at least one bottom transistor. A portion of the metal wiring structures of the top substrate and a portion of the metal wiring structures of the bottom substrate being at least one shared capacitor between the at least one top transistor and the at least one bottom transistor. Airgaps may be formed above the transistor.